cpu/sam0_common: implement periph_gpio_ll_irq

Co-authored-by: benpicco <benpicco@googlemail.com>
RIOT-OS · Jan 22, 2024 · 1484d30 · 1484d30
1 parent 8557565
commit 1484d30
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Showing 6 changed files with 349 additions and 5 deletions.
diff --git a/cpu/sam0_common/Kconfig b/cpu/sam0_common/Kconfig
@@ -16,6 +16,10 @@ config CPU_COMMON_SAM0
     select HAS_PERIPH_GPIO
     select HAS_PERIPH_GPIO_IRQ
     select HAS_PERIPH_GPIO_LL
+    select HAS_PERIPH_GPIO_LL_IRQ
+    select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
+    select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
+    select HAS_PERIPH_GPIO_LL_IRQ_UNMASK
     select HAS_PERIPH_I2C_RECONFIGURE
     select HAS_PERIPH_RTT_SET_COUNTER
     select HAS_PERIPH_RTT_OVERFLOW

diff --git a/cpu/sam0_common/Makefile.features b/cpu/sam0_common/Makefile.features
@@ -14,6 +14,10 @@ FEATURES_PROVIDED += periph_flashpage_pagewise
 FEATURES_PROVIDED += periph_flashpage_rwee
 FEATURES_PROVIDED += periph_gpio periph_gpio_irq
 FEATURES_PROVIDED += periph_gpio_ll
+FEATURES_PROVIDED += periph_gpio_ll_irq
+FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_high
+FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_low
+FEATURES_PROVIDED += periph_gpio_ll_irq_unmask
 FEATURES_PROVIDED += periph_i2c_reconfigure
 FEATURES_PROVIDED += periph_rtt_overflow
 FEATURES_PROVIDED += periph_rtt_set_counter
@@ -36,6 +40,9 @@ FEATURES_PROVIDED += periph_wdt periph_wdt_cb periph_wdt_warning_period
 FEATURES_CONFLICT += periph_rtc:periph_rtt
 FEATURES_CONFLICT_MSG += "The RTC and RTT map to the same hardware peripheral."
 
+FEATURES_CONFLICT += periph_gpio_irq:periph_gpio_ll_irq
+FEATURES_CONFLICT_MSG += "GPIO IRQs can only be managed with one API."
+
 include $(RIOTCPU)/cortexm_common/Makefile.features
 
 # Add sam0 configurations after including cortexm_common so sam0 takes precendence

diff --git a/cpu/sam0_common/include/gpio_ll_arch.h b/cpu/sam0_common/include/gpio_ll_arch.h
@@ -1,6 +1,7 @@
 /*
  * Copyright (C) 2016 Freie Universität Berlin
  *               2017 OTA keys S.A.
+ *               2023 Otto-von-Guericke-Universität Magdeburg
  *
  * This file is subject to the terms and conditions of the GNU Lesser
  * General Public License v2.1. See the file LICENSE in the top level
@@ -15,11 +16,7 @@
  * @file
  * @brief           CPU specific part of the Peripheral GPIO Low-Level API
  *
- * @author          Troels Hoffmeyer <troels.d.hoffmeyer@gmail.com>
- * @author          Thomas Eichinger <thomas.eichinger@fu-berlin.de>
- * @author          Kaspar Schleiser <kaspar@schleiser.de>
- * @author          Hauke Petersen <hauke.petersen@fu-berlin.de>
- * @author          Juergen Fitschen <me@jue.yt>
+ * @author          Marian Buschsieweke <marian.buschsieweke@posteo.net>
  */
 
 #ifndef GPIO_LL_ARCH_H

diff --git a/cpu/sam0_common/include/periph_cpu_common.h b/cpu/sam0_common/include/periph_cpu_common.h
@@ -255,6 +255,7 @@ typedef enum {
     GPIO_MUX_L = 0xb,       /**< select peripheral function L */
     GPIO_MUX_M = 0xc,       /**< select peripheral function M */
     GPIO_MUX_N = 0xd,       /**< select peripheral function N */
+    GPIO_MUX_DISABLED = 0xff, /**< Disable  */
 } gpio_mux_t;
 #endif
 

diff --git a/cpu/sam0_common/periph/gpio_ll.c b/cpu/sam0_common/periph/gpio_ll.c
@@ -53,6 +53,29 @@ static inline void print_str(const char *str)
 }
 #endif
 
+void gpio_ll_mux(gpio_port_t port, uint8_t pin, gpio_mux_t mux)
+{
+    assume(pin < 32);
+    assume(gpio_port_unpack_addr(port) == NULL);
+    PortGroup *iobus = (PortGroup *)port;
+    PortGroup *apb = sam0_gpio_iobus2ap(iobus);
+
+    unsigned irq_state = irq_disable();
+    if (mux == GPIO_MUX_DISABLED) {
+        apb->PINCFG[pin].bit.PMUXEN = 0;
+    }
+    else {
+        unsigned pmux_reg = pin >> 1;
+        unsigned pmux_pos = (pin & 0x01) << 2;
+        apb->PINCFG[pin].bit.PMUXEN = 1;
+        unsigned pmux = apb->PMUX[pmux_reg].reg;
+        pmux &= ~(PORT_PMUX_PMUXE_Msk << pmux_pos);
+        pmux |= (unsigned)mux << pmux_pos;
+        apb->PMUX[pmux_reg].reg = pmux;
+    }
+    irq_restore(irq_state);
+}
+
 int gpio_ll_init(gpio_port_t port, uint8_t pin, gpio_conf_t conf)
 {
     assume(pin < 32);