board/ellduino: Adds preliminary support for Ellduino board

boards/ellduino/Makefile

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+# tell the Makefile.base which module to build
+MODULE = $(BOARD)_base
+
+include $(RIOTBASE)/Makefile.base

boards/ellduino/Makefile.include

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+# define the cpu used by the ellduino board
+export CPU = stm32f0
+export CPU_MODEL = stm32f051r8
+
+#define the default port depending on the host OS
+OS := $(shell uname)
+ifeq ($(OS),Linux)
+  PORT ?= /dev/ttyUSB0
+else ifeq ($(OS),Darwin)
+  PORT ?= $(shell ls -1 /dev/tty.SLAB_USBtoUART* | head -n 1)
+else
+  $(info CAUTION: No flash tool for your host system found!)
+  # TODO: add support for windows as host platform
+endif
+export PORT
+
+# define tools used for building the project
+export PREFIX = arm-none-eabi-
+export CC = $(PREFIX)gcc
+export AR = $(PREFIX)ar
+export AS = $(PREFIX)as
+export LINK = $(PREFIX)gcc
+export SIZE = $(PREFIX)size
+export OBJCOPY = $(PREFIX)objcopy
+export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm
+export FLASHER = stm32flash
+export DEBUGGER = $(RIOTBOARD)/$(BOARD)/dist/debug.sh
+export DEBUGSERVER = st-util
+
+# define build specific options
+CPU_USAGE = -mcpu=cortex-m0
+FPU_USAGE =
+export CFLAGS += -ggdb -g3 -std=gnu99 -Os -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mthumb-interwork -nostartfiles
+export CFLAGS += -ffunction-sections -fdata-sections -fno-builtin
+export ASFLAGS += -ggdb -g3 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian
+export LINKFLAGS += -g3 -ggdb -std=gnu99 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -static -lgcc -mthumb -mthumb-interwork -nostartfiles
+# $(LINKERSCRIPT) is specified in cpu/Makefile.include
+export LINKFLAGS += -T$(LINKERSCRIPT)
+export OFLAGS = -O binary
+export FFLAGS = -w bin/$(BOARD)/$(APPLICATION).hex $(PORT)
+export DEBUGGER_FLAGS = $(RIOTBOARD)/$(BOARD)/dist/gdb.conf bin/$(BOARD)/$(APPLICATION).elf
+export TERMFLAGS += -p "$(PORT)"
+
+# use the nano-specs of the NewLib when available
+ifeq ($(shell $(LINK) -specs=nano.specs -E - 2>/dev/null >/dev/null </dev/null ; echo $$?),0)
+export LINKFLAGS += -specs=nano.specs -lc -lnosys
+endif
+
+# export board specific includes to the global includes-listing
+export INCLUDES += -I$(RIOTBOARD)/$(BOARD)/include

boards/ellduino/board.c

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+/*
+ * Copyright (C) 2014 ELL-i co-operative
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @ingroup     board_ellduino
+ * @{
+ *
+ * @file
+ * @brief       Board specific implementations for the ELL-i ellduino board
+ *
+ * @author      Lari Lehtomäki <lari@lehtomaki.fi
+ *
+ * @}
+ */
+
+#include "board.h"
+#include "periph/uart.h"
+
+static void clock_init(void);
+
+void board_init(void)
+{
+
+    /* initialize the CPU */
+    cpu_init();
+
+    /* Initialize the HSI+PLL clocks as the board does not have external
+     * clock source.
+     */
+    clock_init();
+}
+
+
+/**
+ * @brief Configure the controllers clock system
+ *
+ * The clock initialization make the following assumptions:
+ * - the internal HSI clock is used as base clock
+ * - the internal PLL circuit is used for clock refinement
+ *
+ * Use the following formulas to calculate the needed values:
+ *
+ * SYSCLK = ((HSI_VALUE / CLOCK_PLL_M) * CLOCK_PLL_N) / CLOCK_PLL_P
+ * SDIO and RNG Clock =  ((HSI_VALUE / CLOCK_PLL_M) * CLOCK_PLL_N) / CLOCK_PLL_Q
+ *
+ * The actual used values are specified in the board's `periph_conf.h` file.
+ *
+ * NOTE: currently there is not timeout for initialization of PLL and other locks
+ *       -> when wrong values are chosen, the initialization could stall
+ */
+void clock_init(void) {
+    /* set PLL configuration */
+	RCC->CFGR &= (~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMUL));
+	RCC->CFGR |= (RCC_CFGR_PLLSRC_HSI_DIV2 |
+                    RCC_CFGR_PLLXTPRE_HSE_PREDIV_DIV2 |
+                    RCC_CFGR_PLLMUL12);
+
+    /* enable PLL again */
+    RCC->CR |= RCC_CR_PLLON;
+
+    /* wait until PLL is stable */
+    while(!(RCC->CR & RCC_CR_PLLRDY));
+
+
+    /* configure the sysclock and the peripheral clocks */
+
+    /* set sysclock to be driven by the PLL clock */
+    RCC->CFGR &= ~RCC_CFGR_SW;
+    RCC->CFGR |= RCC_CFGR_SW_PLL;
+
+    /* wait for sysclock to be stable */
+    while (!(RCC->CFGR & RCC_CFGR_SWS_PLL));
+}

boards/ellduino/include/board.h

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+/*
+ * Copyright (C) 2014 ELL-i co-operative
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @defgroup    board_ellduino
+ * @ingroup     boards
+ * @brief       Support for the Ellduino board
+ * @{
+ *
+ * @file
+ * @brief       Board specific definitions for the ELL-i Ellduino board.
+ *
+ * @author      Lari Lehtomäki <lari@lehtomaki.fi>
+ */
+
+#ifndef __BOARD_H
+#define __BOARD_H
+
+#include "cpu.h"
+
+
+/**
+ * @name The nominal CPU core clock in this board
+ */
+#define F_CPU               (48000000UL)
+
+/**
+ * @name Assign the peripheral timer to be used as hardware timer
+ */
+#define HW_TIMER            TIMER_0
+
+/**
+ * @name Assign the UART interface to be used for stdio
+ */
+#define STDIO               UART_0
+
+
+/**
+ * @name Dummy LED definition for startup
+ * STM32F0 startup assumes we would have LEDs on board.
+ */
+#define LD4_TOGGLE          /* not available */
+
+/**
+ * @brief Initialize board specific hardware, including clock, LEDs and std-IO
+ */
+void board_init(void);
+
+#endif /** __BOARD_H */
+/** @} */