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cpu/nrf51: use nrfxx_peripherals.h vendor header
Using the nrf51xx_peripherals.h vendor header unifies the nrf51 code tree with the nrf52 implementation. It is needed to prevent build errors with the optional nrfx package.
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/* | ||
Copyright (c) 2010 - 2021, Nordic Semiconductor ASA All rights reserved. | ||
SPDX-License-Identifier: BSD-3-Clause | ||
Redistribution and use in source and binary forms, with or without | ||
modification, are permitted provided that the following conditions are met: | ||
1. Redistributions of source code must retain the above copyright notice, this | ||
list of conditions and the following disclaimer. | ||
2. Redistributions in binary form must reproduce the above copyright | ||
notice, this list of conditions and the following disclaimer in the | ||
documentation and/or other materials provided with the distribution. | ||
3. Neither the name of Nordic Semiconductor ASA nor the names of its | ||
contributors may be used to endorse or promote products derived from this | ||
software without specific prior written permission. | ||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | ||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE | ||
ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE | ||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | ||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | ||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | ||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | ||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
POSSIBILITY OF SUCH DAMAGE. | ||
*/ | ||
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/* This file is deprecated */ | ||
#ifndef _NRF51822_PERIPHERALS_H | ||
#define _NRF51822_PERIPHERALS_H | ||
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/* Clock Peripheral */ | ||
#define CLOCK_PRESENT | ||
#define CLOCK_COUNT 1 | ||
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/* Power Peripheral */ | ||
#define POWER_PRESENT | ||
#define POWER_COUNT 1 | ||
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#define POWER_FEATURE_RAMON_REGISTERS_PRESENT | ||
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/* Non-Volatile Memory Controller */ | ||
#define NVMC_PRESENT | ||
#define NVMC_COUNT 1 | ||
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/* Software Interrupts */ | ||
#define SWI_PRESENT | ||
#define SWI_COUNT 6 | ||
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/* GPIO */ | ||
#define GPIO_PRESENT | ||
#define GPIO_COUNT 1 | ||
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#define P0_PIN_NUM 32 | ||
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#define P0_FEATURE_PINS_PRESENT 0xFFFFFFFFUL | ||
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/* MPU and BPROT */ | ||
#define BPROT_PRESENT | ||
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#define BPROT_REGIONS_SIZE 4096 | ||
#define BPROT_REGIONS_NUM 64 | ||
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/* Radio */ | ||
#define RADIO_PRESENT | ||
#define RADIO_COUNT 1 | ||
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#define RADIO_TXPOWER_TXPOWER_Max RADIO_TXPOWER_TXPOWER_Pos4dBm | ||
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/* Accelerated Address Resolver */ | ||
#define AAR_PRESENT | ||
#define AAR_COUNT 1 | ||
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#define AAR_MAX_IRK_NUM 8 | ||
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/* AES Electronic CodeBook mode encryption */ | ||
#define ECB_PRESENT | ||
#define ECB_COUNT 1 | ||
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/* AES CCM mode encryption */ | ||
#define CCM_PRESENT | ||
#define CCM_COUNT 1 | ||
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/* Peripheral to Peripheral Interconnect */ | ||
#define PPI_PRESENT | ||
#define PPI_COUNT 1 | ||
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#define PPI_CH_NUM 16 | ||
#define PPI_FIXED_CH_NUM 12 | ||
#define PPI_GROUP_NUM 4 | ||
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/* Timer/Counter */ | ||
#define TIMER_PRESENT | ||
#define TIMER_COUNT 3 | ||
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#define TIMER0_MAX_SIZE 32 | ||
#define TIMER1_MAX_SIZE 16 | ||
#define TIMER2_MAX_SIZE 16 | ||
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#define TIMER0_CC_NUM 4 | ||
#define TIMER1_CC_NUM 4 | ||
#define TIMER2_CC_NUM 4 | ||
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/* Real Time Counter */ | ||
#define RTC_PRESENT | ||
#define RTC_COUNT 2 | ||
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#define RTC0_CC_NUM 3 | ||
#define RTC1_CC_NUM 4 | ||
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/* RNG */ | ||
#define RNG_PRESENT | ||
#define RNG_COUNT 1 | ||
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/* Watchdog Timer */ | ||
#define WDT_PRESENT | ||
#define WDT_COUNT 1 | ||
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/* Temperature Sensor */ | ||
#define TEMP_PRESENT | ||
#define TEMP_COUNT 1 | ||
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/* Serial Peripheral Interface Master */ | ||
#define SPI_PRESENT | ||
#define SPI_COUNT 2 | ||
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/* Serial Peripheral Interface Slave with DMA */ | ||
#define SPIS_PRESENT | ||
#define SPIS_COUNT 1 | ||
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#define SPIS1_EASYDMA_MAXCNT_SIZE 8 | ||
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/* Two Wire Interface Master */ | ||
#define TWI_PRESENT | ||
#define TWI_COUNT 2 | ||
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/* Universal Asynchronous Receiver-Transmitter */ | ||
#define UART_PRESENT | ||
#define UART_COUNT 1 | ||
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/* Quadrature Decoder */ | ||
#define QDEC_PRESENT | ||
#define QDEC_COUNT 1 | ||
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/* Analog to Digital Converter */ | ||
#define ADC_PRESENT | ||
#define ADC_COUNT 1 | ||
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/* GPIO Tasks and Events */ | ||
#define GPIOTE_PRESENT | ||
#define GPIOTE_COUNT 1 | ||
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#define GPIOTE_CH_NUM 4 | ||
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/* Low Power Comparator */ | ||
#define LPCOMP_PRESENT | ||
#define LPCOMP_COUNT 1 | ||
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#define LPCOMP_REFSEL_RESOLUTION 8 | ||
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#endif // _NRF51822_PERIPHERALS_H |