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drivers/mrf24j40: adapted to SPI API changes
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@bergzand
bergzand committed Jan 24, 2017
1 parent 87a65bb commit 87cf8e4
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Showing 5 changed files with 67 additions and 78 deletions.
38 changes: 19 additions & 19 deletions drivers/include/mrf24j40.h
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Original file line number Diff line number Diff line change
Expand Up @@ -84,9 +84,9 @@ extern "C" {
* @brief Flags for PSEUDO DEVICE INTERNAL STATES
* @{
*/
#define MRF24J40_PSEUDO_STATE_IDLE (0x01) /**< Idle, ready to transmit or receive */
#define MRF24J40_PSEUDO_STATE_SLEEP (0x02) /**< sleep mode, registers functional, but no RF */
#define MRF24J40_PSEUDO_STATE_RESET (0x04) /**< Reset device, next state is idle */
#define MRF24J40_PSEUDO_STATE_IDLE (0x01) /**< Idle, ready to transmit or receive */
#define MRF24J40_PSEUDO_STATE_SLEEP (0x02) /**< sleep mode, registers functional, but no RF */
#define MRF24J40_PSEUDO_STATE_RESET (0x04) /**< Reset device, next state is idle */
/** @} */

/**
Expand All @@ -97,20 +97,20 @@ extern "C" {
*
* @{
*/
#define MRF24J40_OPT_CSMA (0x0100) /**< CSMA active */
#define MRF24J40_OPT_PROMISCUOUS (0x0200) /**< promiscuous mode
* active */
#define MRF24J40_OPT_PRELOADING (0x0400) /**< preloading enabled */
#define MRF24J40_OPT_TELL_TX_START (0x0800) /**< notify MAC layer on TX
* start */
#define MRF24J40_OPT_TELL_TX_END (0x1000) /**< notify MAC layer on TX
* finished */
#define MRF24J40_OPT_TELL_RX_START (0x2000) /**< notify MAC layer on RX
* start */
#define MRF24J40_OPT_TELL_RX_END (0x4000) /**< notify MAC layer on RX
* finished */
#define MRF24J40_OPT_REQ_AUTO_ACK (0x8000) /**< notify MAC layer on RX
* finished */
#define MRF24J40_OPT_CSMA (0x0100) /**< CSMA active */
#define MRF24J40_OPT_PROMISCUOUS (0x0200) /**< promiscuous mode
* active */
#define MRF24J40_OPT_PRELOADING (0x0400) /**< preloading enabled */
#define MRF24J40_OPT_TELL_TX_START (0x0800) /**< notify MAC layer on TX
* start */
#define MRF24J40_OPT_TELL_TX_END (0x1000) /**< notify MAC layer on TX
* finished */
#define MRF24J40_OPT_TELL_RX_START (0x2000) /**< notify MAC layer on RX
* start */
#define MRF24J40_OPT_TELL_RX_END (0x4000) /**< notify MAC layer on RX
* finished */
#define MRF24J40_OPT_REQ_AUTO_ACK (0x8000) /**< notify MAC layer on RX
* finished */
/** @} */


Expand All @@ -125,8 +125,8 @@ extern "C" {
*/
typedef struct mrf24j40_params {
spi_t spi; /**< SPI bus the device is connected to */
spi_speed_t spi_speed; /**< SPI speed to use */
gpio_t cs_pin; /**< GPIO pin connected to chip select */
spi_clk_t spi_clk; /**< SPI speed to use */
spi_cs_t cs_pin; /**< GPIO pin connected to chip select */
gpio_t int_pin; /**< GPIO pin connected to the interrupt pin */
gpio_t reset_pin; /**< GPIO pin connected to the reset pin */
} mrf24j40_params_t;
Expand Down
8 changes: 4 additions & 4 deletions drivers/mrf24j40/include/mrf24j40_params.h
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Original file line number Diff line number Diff line change
Expand Up @@ -32,10 +32,10 @@ extern "C" {
* @{
*/
#ifndef MRF24J40_PARAM_SPI
#define MRF24J40_PARAM_SPI (SPI_0)
#define MRF24J40_PARAM_SPI (SPI_DEV(0))
#endif
#ifndef MRF24J40_PARAM_SPI_SPEED
#define MRF24J40_PARAM_SPI_SPEED (SPI_SPEED_5MHZ)
#ifndef MRF24J40_PARAM_SPI_CLK
#define MRF24J40_PARAM_SPI_CLK (SPI_CLK_5MHZ)
#endif
#ifndef MRF24J40_PARAM_CS
#define MRF24J40_PARAM_CS (GPIO_PIN(0, 0))
Expand All @@ -48,7 +48,7 @@ extern "C" {
#endif

#define MRF24J40_PARAMS_DEFAULT { .spi = MRF24J40_PARAM_SPI, \
.spi_speed = MRF24J40_PARAM_SPI_SPEED, \
.spi_clk = MRF24J40_PARAM_SPI_CLK, \
.cs_pin = MRF24J40_PARAM_CS, \
.int_pin = MRF24J40_PARAM_INT, \
.reset_pin = MRF24J40_PARAM_RESET }
Expand Down
3 changes: 0 additions & 3 deletions drivers/mrf24j40/mrf24j40.c
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Original file line number Diff line number Diff line change
Expand Up @@ -38,9 +38,6 @@ void mrf24j40_setup(mrf24j40_t *dev, const mrf24j40_params_t *params)
netdev->driver = &mrf24j40_driver;
/* initialize device descriptor */
memcpy(&dev->params, params, sizeof(mrf24j40_params_t));
/* initialise SPI */
spi_init_master(dev->params.spi, SPI_CONF_FIRST_RISING, params->spi_speed);

}

void mrf24j40_reset(mrf24j40_t *dev)
Expand Down
93 changes: 43 additions & 50 deletions drivers/mrf24j40/mrf24j40_internal.c
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Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,14 @@
#define ENABLE_DEBUG (0)
#include "debug.h"

#define SPIDEV (dev->params.spi)
#define CSPIN (dev->params.cs_pin)

static inline void getbus(mrf24j40_t *dev)
{
spi_acquire(SPIDEV, CSPIN, SPI_MODE_0, dev->params.spi_clk);
}

void mrf24j40_init(mrf24j40_t *dev)
{
uint8_t softrst;
Expand Down Expand Up @@ -89,26 +97,21 @@ uint8_t mrf24j40_reg_read_short(mrf24j40_t *dev, const uint8_t addr)
{
char value;

spi_acquire(dev->params.spi);
gpio_clear(dev->params.cs_pin);
spi_transfer_reg(dev->params.spi, MRF24J40_SHORT_ADDR_TRANS |
(addr << MRF24J40_ADDR_OFFSET) |
MRF24J40_ACCESS_READ, 0, &value);
gpio_set(dev->params.cs_pin);
spi_release(dev->params.spi);

getbus(dev);
value = spi_transfer_reg(SPIDEV, CSPIN, MRF24J40_SHORT_ADDR_TRANS |
(addr << MRF24J40_ADDR_OFFSET) |
MRF24J40_ACCESS_READ, 0);
spi_release(SPIDEV);
return (uint8_t)value;
}

void mrf24j40_reg_write_short(mrf24j40_t *dev, const uint8_t addr, const uint8_t value)
{
spi_acquire(dev->params.spi);
gpio_clear(dev->params.cs_pin);
spi_transfer_reg(dev->params.spi, MRF24J40_SHORT_ADDR_TRANS |
(addr << MRF24J40_ADDR_OFFSET) |
MRF24J40_ACCESS_WRITE, value, 0);
gpio_set(dev->params.cs_pin);
spi_release(dev->params.spi);
getbus(dev);
spi_transfer_reg(SPIDEV, CSPIN , MRF24J40_SHORT_ADDR_TRANS |
(addr << MRF24J40_ADDR_OFFSET) |
MRF24J40_ACCESS_WRITE, value);
spi_release(SPIDEV);
}

uint8_t mrf24j40_reg_read_long(mrf24j40_t *dev, const uint16_t addr)
Expand All @@ -118,13 +121,11 @@ uint8_t mrf24j40_reg_read_long(mrf24j40_t *dev, const uint16_t addr)
reg1 = MRF24J40_LONG_ADDR_TRANS | (addr >> 3);
reg2 = (addr << 5) | MRF24J40_ACCESS_READ;
char value;
spi_acquire(dev->params.spi);
gpio_clear(dev->params.cs_pin);
spi_transfer_byte(dev->params.spi, reg1, 0);
spi_transfer_byte(dev->params.spi, reg2, &value);
spi_transfer_byte(dev->params.spi, 0, &value);
gpio_set(dev->params.cs_pin);
spi_release(dev->params.spi);
getbus(dev);
spi_transfer_byte(SPIDEV, CSPIN, true, reg1);
spi_transfer_byte(SPIDEV, CSPIN, true, reg2);
value = spi_transfer_byte(SPIDEV, CSPIN, false, 0);
spi_release(SPIDEV);

return (uint8_t)value;
}
Expand All @@ -135,13 +136,11 @@ void mrf24j40_reg_write_long(mrf24j40_t *dev, const uint16_t addr, const uint8_t

reg1 = MRF24J40_LONG_ADDR_TRANS | (addr >> 3);
reg2 = (addr << 5) | MRF24J40_ACCESS_WRITE_LNG;
spi_acquire(dev->params.spi);
gpio_clear(dev->params.cs_pin);
spi_transfer_byte(dev->params.spi, reg1, 0);
spi_transfer_byte(dev->params.spi, reg2, 0);
spi_transfer_byte(dev->params.spi, value, 0);
gpio_set(dev->params.cs_pin);
spi_release(dev->params.spi);
getbus(dev);
spi_transfer_byte(SPIDEV, CSPIN, true, reg1);
spi_transfer_byte(SPIDEV, CSPIN, true, reg2);
spi_transfer_byte(SPIDEV, CSPIN, false, value);
spi_release(SPIDEV);
}

void mrf24j40_tx_normal_fifo_read(mrf24j40_t *dev, const uint16_t offset, uint8_t *data, const size_t len)
Expand All @@ -150,13 +149,11 @@ void mrf24j40_tx_normal_fifo_read(mrf24j40_t *dev, const uint16_t offset, uint8_

reg1 = MRF24J40_LONG_ADDR_TRANS | (offset >> 3);
reg2 = (offset << 5) | MRF24J40_ACCESS_READ;
spi_acquire(dev->params.spi);
gpio_clear(dev->params.cs_pin);
spi_transfer_byte(dev->params.spi, reg1, NULL);
spi_transfer_byte(dev->params.spi, reg2, (char *)data);
spi_transfer_bytes(dev->params.spi, NULL, (char *)data, len);
gpio_set(dev->params.cs_pin);
spi_release(dev->params.spi);
getbus(dev);
spi_transfer_byte(SPIDEV, CSPIN, true, reg1);
spi_transfer_byte(SPIDEV, CSPIN, true, reg2);
spi_transfer_bytes(SPIDEV, CSPIN, false, NULL, (char *)data, len);
spi_release(SPIDEV);
}

void mrf24j40_tx_normal_fifo_write(mrf24j40_t *dev,
Expand All @@ -173,13 +170,11 @@ void mrf24j40_tx_normal_fifo_write(mrf24j40_t *dev,
reg1 = MRF24J40_LONG_ADDR_TRANS | (addr >> 3);
reg2 = (addr << 5) | MRF24J40_ACCESS_WRITE_LNG;

spi_acquire(dev->params.spi);
gpio_clear(dev->params.cs_pin);
spi_transfer_byte(dev->params.spi, reg1, 0);
spi_transfer_byte(dev->params.spi, reg2, 0);
spi_transfer_bytes(dev->params.spi, (char *)data, NULL, len);
gpio_set(dev->params.cs_pin);
spi_release(dev->params.spi);
getbus(dev);
spi_transfer_byte(SPIDEV, CSPIN, true, reg1);
spi_transfer_byte(SPIDEV, CSPIN, true, reg2);
spi_transfer_bytes(SPIDEV, CSPIN, false, (char *)data, NULL, len);
spi_release(SPIDEV);
}

void mrf24j40_rx_fifo_read(mrf24j40_t *dev, const uint16_t offset, uint8_t *data, const size_t len)
Expand All @@ -191,13 +186,11 @@ void mrf24j40_rx_fifo_read(mrf24j40_t *dev, const uint16_t offset, uint8_t *data
uint8_t reg1, reg2;
reg1 = MRF24J40_LONG_ADDR_TRANS | (rx_addr >> 3);
reg2 = (rx_addr << 5) | MRF24J40_ACCESS_READ;
spi_acquire(dev->params.spi);
gpio_clear(dev->params.cs_pin);
spi_transfer_byte(dev->params.spi, reg1, NULL);
spi_transfer_byte(dev->params.spi, reg2, (char *)data);
spi_transfer_bytes(dev->params.spi, NULL, (char *)data, len);
gpio_set(dev->params.cs_pin);
spi_release(dev->params.spi);
getbus(dev);
spi_transfer_byte(SPIDEV, CSPIN, true, reg1);
spi_transfer_byte(SPIDEV, CSPIN, true, reg2);
spi_transfer_bytes(SPIDEV, CSPIN, false, NULL, (char *)data, len);
spi_release(SPIDEV);
}

void mrf24j40_rx_fifo_write(mrf24j40_t *dev, const uint16_t offset, const uint8_t *data, const size_t len)
Expand Down
3 changes: 1 addition & 2 deletions drivers/mrf24j40/mrf24j40_netdev.c
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Original file line number Diff line number Diff line change
Expand Up @@ -70,8 +70,7 @@ static int _init(netdev2_t *netdev)
mrf24j40_t *dev = (mrf24j40_t *)netdev;

/* initialise GPIOs */
gpio_init(dev->params.cs_pin, GPIO_OUT);
gpio_set(dev->params.cs_pin);
spi_init_cs(dev->params.spi, dev->params.cs_pin);
gpio_init(dev->params.reset_pin, GPIO_OUT);
gpio_set(dev->params.reset_pin);
gpio_init_int(dev->params.int_pin, GPIO_IN, GPIO_RISING, _irq_handler, dev);
Expand Down

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