Merge #19733 #19747

19733: cpu/msp430: reorganize code r=maribu a=maribu ### Contribution description RIOT supports two distinct families of the MSP430: The [MSP430 x1xx] MCU family and the [MSP430 F2xx/G2xx] MCU family. For both incompatible MCU families the code was located in the msp430fxyz folder, resulting in case of the UART driver in particularly bizarre code looking roughly like this: ```C #ifndef UART_USE_USCI /* implementation of x1xx peripheral ... */ #else /* implementation of F2xx/G2xx peripheral ... */ #endif /* zero shared code between both variants */ ``` This moves peripheral drivers shared between the two families to msp430_common and splits the SPI and UART driver into two MCU families. In addition, it cleans up the `msp430_regs.h` by dropping most of it and using the macros and symbols provided by the vendor header files. There is little reason for us to maintain constants when TI is already doing that. [MSP430 x1xx]: https://www.ti.com/lit/ug/slau049f/slau049f.pdf [MSP430 F2xx/G2xx]: https://www.ti.com/lit/ug/slau144k/slau144k.pdf 19747: gnrc/ipv6/nib: reset rs_sent counter also for not-6LN interfaces r=maribu a=fabian18 Co-authored-by: Marian Buschsieweke <marian.buschsieweke@posteo.net> Co-authored-by: Fabian Hüßler <fabian.huessler@ml-pa.com>
RIOT-OS · Jul 4, 2023 · 913dc0f · 913dc0f
3 parents 852e9c5 + 45b353c + 7ea264e
commit 913dc0f
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Showing 97 changed files with 1,390 additions and 1,194 deletions.
diff --git a/boards/common/msb-430/Makefile.features b/boards/common/msb-430/Makefile.features
@@ -1,2 +1,2 @@
-CPU = msp430fxyz
+CPU = msp430
 CPU_MODEL = msp430f1612
diff --git a/boards/msb-430/include/periph_conf.h b/boards/msb-430/include/periph_conf.h
@@ -28,12 +28,12 @@
 extern "C" {
 #endif
 
-#define CLOCK_CORECLOCK     msp430_fxyz_dco_freq
+#define CLOCK_CORECLOCK     msp430_dco_freq
 
 /**
  * @brief   Clock configuration
  */
-static const msp430_fxyz_clock_params_t clock_params = {
+static const msp430_clock_params_t clock_params = {
     .target_dco_frequency = 7372800U,
     .lfxt1_frequency = 32768,
     .main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,
@@ -49,7 +49,7 @@ static const msp430_fxyz_clock_params_t clock_params = {
  * @{
  */
 #define TIMER_NUMOF         (1U)
-#define TIMER_BASE          (TIMER_A)
+#define TIMER_BASE          (&TIMER_A)
 #define TIMER_CHAN          (3)
 #define TIMER_ISR_CC0       (TIMERA0_VECTOR)
 #define TIMER_ISR_CCX       (TIMERA1_VECTOR)
@@ -61,14 +61,12 @@ static const msp430_fxyz_clock_params_t clock_params = {
  */
 #define UART_NUMOF          (1U)
 
-#define UART_BASE           (USART_1)
-#define UART_IE             (SFR->IE2)
-#define UART_IF             (SFR->IFG2)
+#define UART_BASE           (&USART_1)
+#define UART_SFR            (&USART_1_SFR)
 #define UART_IE_RX_BIT      (1 << 4)
 #define UART_IE_TX_BIT      (1 << 5)
-#define UART_ME             (SFR->ME2)
 #define UART_ME_BITS        (0x30)
-#define UART_PORT           (PORT_3)
+#define UART_PORT           (&PORT_3)
 #define UART_RX_PIN         (1 << 6)
 #define UART_TX_PIN         (1 << 7)
 #define UART_RX_ISR         (USART1RX_VECTOR)
@@ -82,12 +80,10 @@ static const msp430_fxyz_clock_params_t clock_params = {
 #define SPI_NUMOF           (1U)
 
 /* SPI configuration */
-#define SPI_BASE            (USART_0)
-#define SPI_IE              (SFR->IE1)
-#define SPI_IF              (SFR->IFG1)
+#define SPI_BASE            (&USART_0)
+#define SPI_SFR             (&USART_0_SFR)
 #define SPI_IE_RX_BIT       (1 << 6)
 #define SPI_IE_TX_BIT       (1 << 7)
-#define SPI_ME              (SFR->ME1)
 #define SPI_ME_BIT          (1 << 6)
 #define SPI_PIN_MISO        GPIO_PIN(P5, 2)
 #define SPI_PIN_MOSI        GPIO_PIN(P5, 1)

diff --git a/boards/msb-430h/include/periph_conf.h b/boards/msb-430h/include/periph_conf.h
@@ -32,7 +32,7 @@ extern "C" {
 /**
  * @brief   Clock configuration
  */
-static const msp430_fxyz_clock_params_t clock_params = {
+static const msp430_clock_params_t clock_params = {
     .xt2_frequency = CLOCK_CORECLOCK,
     .lfxt1_frequency = 32768,
     .main_clock_source = MAIN_CLOCK_SOURCE_XT2CLK,
@@ -48,7 +48,7 @@ static const msp430_fxyz_clock_params_t clock_params = {
  * @{
  */
 #define TIMER_NUMOF         (1U)
-#define TIMER_BASE          (TIMER_A)
+#define TIMER_BASE          (&TIMER_A)
 #define TIMER_CHAN          (3)
 #define TIMER_ISR_CC0       (TIMERA0_VECTOR)
 #define TIMER_ISR_CCX       (TIMERA1_VECTOR)
@@ -60,14 +60,12 @@ static const msp430_fxyz_clock_params_t clock_params = {
  */
 #define UART_NUMOF          (1U)
 
-#define UART_BASE           (USART_1)
-#define UART_IE             (SFR->IE2)
-#define UART_IF             (SFR->IFG2)
+#define UART_BASE           (&USART_1)
+#define UART_SFR            (&USART_1_SFR)
 #define UART_IE_RX_BIT      (1 << 4)
 #define UART_IE_TX_BIT      (1 << 5)
-#define UART_ME             (SFR->ME2)
 #define UART_ME_BITS        (0x30)
-#define UART_PORT           (PORT_3)
+#define UART_PORT           (&PORT_3)
 #define UART_RX_PIN         (1 << 6)
 #define UART_TX_PIN         (1 << 7)
 #define UART_RX_ISR         (USART1RX_VECTOR)
@@ -81,12 +79,10 @@ static const msp430_fxyz_clock_params_t clock_params = {
 #define SPI_NUMOF           (1U)
 
 /* SPI configuration */
-#define SPI_BASE            (USART_0)
-#define SPI_IE              (SFR->IE1)
-#define SPI_IF              (SFR->IFG1)
+#define SPI_BASE            (&USART_0)
+#define SPI_SFR             (&USART_0_SFR)
 #define SPI_IE_RX_BIT       (1 << 6)
 #define SPI_IE_TX_BIT       (1 << 7)
-#define SPI_ME              (SFR->ME1)
 #define SPI_ME_BIT          (1 << 6)
 #define SPI_PIN_MISO        GPIO_PIN(P3, 2)
 #define SPI_PIN_MOSI        GPIO_PIN(P3, 1)

diff --git a/boards/olimex-msp430-h1611/Makefile.features b/boards/olimex-msp430-h1611/Makefile.features
@@ -1,4 +1,4 @@
-CPU = msp430fxyz
+CPU = msp430
 CPU_MODEL = msp430f1611
 
 # Put defined MCU peripherals here (in alphabetical order)

diff --git a/boards/olimex-msp430-h1611/include/periph_conf.h b/boards/olimex-msp430-h1611/include/periph_conf.h
@@ -28,12 +28,12 @@
 extern "C" {
 #endif
 
-#define CLOCK_CORECLOCK     msp430_fxyz_dco_freq
+#define CLOCK_CORECLOCK     msp430_dco_freq
 
 /**
  * @brief   Clock configuration
  */
-static const msp430_fxyz_clock_params_t clock_params = {
+static const msp430_clock_params_t clock_params = {
     .target_dco_frequency = MHZ(8),
     .lfxt1_frequency = 32768,
     .main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,
@@ -48,7 +48,7 @@ static const msp430_fxyz_clock_params_t clock_params = {
  * @{
  */
 #define TIMER_NUMOF         (1U)
-#define TIMER_BASE          (TIMER_A)
+#define TIMER_BASE          (&TIMER_A)
 #define TIMER_CHAN          (3)
 #define TIMER_ISR_CC0       (TIMERA0_VECTOR)
 #define TIMER_ISR_CCX       (TIMERA1_VECTOR)
@@ -60,14 +60,12 @@ static const msp430_fxyz_clock_params_t clock_params = {
  */
 #define UART_NUMOF          (1U)
 
-#define UART_BASE           (USART_1)
-#define UART_IE             (SFR->IE2)
-#define UART_IF             (SFR->IFG2)
+#define UART_BASE           (&USART_1)
+#define UART_SFR            (&USART_1_SFR)
 #define UART_IE_RX_BIT      (1 << 4)
 #define UART_IE_TX_BIT      (1 << 5)
-#define UART_ME             (SFR->ME2)
 #define UART_ME_BITS        (0x30)
-#define UART_PORT           (PORT_3)
+#define UART_PORT           (&PORT_3)
 #define UART_RX_PIN         (1 << 6)
 #define UART_TX_PIN         (1 << 7)
 #define UART_RX_ISR         (USART1RX_VECTOR)
@@ -81,12 +79,10 @@ static const msp430_fxyz_clock_params_t clock_params = {
 #define SPI_NUMOF           (1U)
 
 /* SPI configuration */
-#define SPI_BASE            (USART_0)
-#define SPI_IE              (SFR->IE1)
-#define SPI_IF              (SFR->IFG1)
+#define SPI_BASE            (&USART_0)
+#define SPI_SFR             (&USART_0_SFR)
 #define SPI_IE_RX_BIT       (1 << 6)
 #define SPI_IE_TX_BIT       (1 << 7)
-#define SPI_ME              (SFR->ME1)
 #define SPI_ME_BIT          (1 << 6)
 #define SPI_PIN_MISO        GPIO_PIN(P3, 2)
 #define SPI_PIN_MOSI        GPIO_PIN(P3, 1)

diff --git a/boards/olimex-msp430-h2618/Makefile.features b/boards/olimex-msp430-h2618/Makefile.features
@@ -1,4 +1,4 @@
-CPU = msp430fxyz
+CPU = msp430
 CPU_MODEL = msp430f2618
 
 # Put defined MCU peripherals here (in alphabetical order)

diff --git a/boards/olimex-msp430-h2618/include/periph_conf.h b/boards/olimex-msp430-h2618/include/periph_conf.h
@@ -27,12 +27,12 @@
 extern "C" {
 #endif
 
-#define CLOCK_CORECLOCK     msp430_fxyz_dco_freq
+#define CLOCK_CORECLOCK     msp430_dco_freq
 
 /**
  * @brief   Clock configuration
  */
-static const msp430_fxyz_clock_params_t clock_params = {
+static const msp430_clock_params_t clock_params = {
     .target_dco_frequency = MHZ(16),
     .lfxt1_frequency = 32768,
     .main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,
@@ -47,7 +47,7 @@ static const msp430_fxyz_clock_params_t clock_params = {
  * @{
  */
 #define TIMER_NUMOF         (1U)
-#define TIMER_BASE          (TIMER_A)
+#define TIMER_BASE          (&TIMER_A)
 #define TIMER_CHAN          (3)
 #define TIMER_ISR_CC0       (TIMERA0_VECTOR)
 #define TIMER_ISR_CCX       (TIMERA1_VECTOR)
@@ -59,15 +59,14 @@ static const msp430_fxyz_clock_params_t clock_params = {
  */
 #define UART_NUMOF          (1U)
 
-#define UART_USE_USCI
-#define UART_BASE           (USCI_0)
-#define UART_IE             (SFR->IE2)
-#define UART_IF             (SFR->IFG2)
+#define UART_BASE           (&USCI_A0)
+#define UART_IE             (IE2)
+#define UART_IF             (IFG2)
 #define UART_IE_RX_BIT      (1 << 0)
 #define UART_IE_TX_BIT      (1 << 1)
-#define UART_RX_PORT        ((msp_port_t *)PORT_3)
+#define UART_RX_PORT        (&PORT_3)
 #define UART_RX_PIN         (1 << 5)
-#define UART_TX_PORT        ((msp_port_t *)PORT_3)
+#define UART_TX_PORT        (&PORT_3)
 #define UART_TX_PIN         (1 << 4)
 #define UART_RX_ISR         (USCIAB0RX_VECTOR)
 #define UART_TX_ISR         (USCIAB0TX_VECTOR)
@@ -80,10 +79,9 @@ static const msp430_fxyz_clock_params_t clock_params = {
 #define SPI_NUMOF           (1U)
 
 /* SPI configuration */
-#define SPI_USE_USCI
-#define SPI_BASE            (USCI_0_B_SPI)
-#define SPI_IE              (SFR->IE2)
-#define SPI_IF              (SFR->IFG2)
+#define SPI_BASE            (&USCI_B0)
+#define SPI_IE              (IE2)
+#define SPI_IF              (IFG2)
 #define SPI_IE_RX_BIT       (1 << 2)
 #define SPI_IE_TX_BIT       (1 << 3)
 #define SPI_PIN_MISO        GPIO_PIN(P3, 2)

diff --git a/boards/telosb/Makefile.features b/boards/telosb/Makefile.features
@@ -1,4 +1,4 @@
-CPU = msp430fxyz
+CPU = msp430
 CPU_MODEL = msp430f1611
 
 # Put defined MCU peripherals here (in alphabetical order)

diff --git a/boards/telosb/include/periph_conf.h b/boards/telosb/include/periph_conf.h
@@ -28,12 +28,12 @@
 extern "C" {
 #endif
 
-#define CLOCK_CORECLOCK             msp430_fxyz_dco_freq
+#define CLOCK_CORECLOCK             msp430_dco_freq
 
 /**
  * @brief   Clock configuration
  */
-static const msp430_fxyz_clock_params_t clock_params = {
+static const msp430_clock_params_t clock_params = {
     .target_dco_frequency = 2457600U,
     .lfxt1_frequency = 32768,
     .main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,
@@ -48,7 +48,7 @@ static const msp430_fxyz_clock_params_t clock_params = {
  * @{
  */
 #define TIMER_NUMOF         (1U)
-#define TIMER_BASE          (TIMER_A)
+#define TIMER_BASE          (&TIMER_A)
 #define TIMER_CHAN          (3)
 #define TIMER_ISR_CC0       (TIMERA0_VECTOR)
 #define TIMER_ISR_CCX       (TIMERA1_VECTOR)
@@ -60,14 +60,12 @@ static const msp430_fxyz_clock_params_t clock_params = {
  */
 #define UART_NUMOF          (1U)
 
-#define UART_BASE           (USART_1)
-#define UART_IE             (SFR->IE2)
-#define UART_IF             (SFR->IFG2)
+#define UART_BASE           (&USART_1)
+#define UART_SFR            (&USART_1_SFR)
 #define UART_IE_RX_BIT      (1 << 4)
 #define UART_IE_TX_BIT      (1 << 5)
-#define UART_ME             (SFR->ME2)
 #define UART_ME_BITS        (0x30)
-#define UART_PORT           (PORT_3)
+#define UART_PORT           (&PORT_3)
 #define UART_RX_PIN         (1 << 6)
 #define UART_TX_PIN         (1 << 7)
 #define UART_RX_ISR         (USART1RX_VECTOR)
@@ -80,13 +78,10 @@ static const msp430_fxyz_clock_params_t clock_params = {
  */
 #define SPI_NUMOF           (1U)
 
-/* SPI configuration */
-#define SPI_BASE            (USART_0)
-#define SPI_IE              (SFR->IE1)
-#define SPI_IF              (SFR->IFG1)
+#define SPI_BASE            (&USART_0)
+#define SPI_SFR             (&USART_0_SFR)
 #define SPI_IE_RX_BIT       (1 << 6)
 #define SPI_IE_TX_BIT       (1 << 7)
-#define SPI_ME              (SFR->ME1)
 #define SPI_ME_BIT          (1 << 6)
 #define SPI_PIN_MISO        GPIO_PIN(P3, 2)
 #define SPI_PIN_MOSI        GPIO_PIN(P3, 1)

diff --git a/boards/z1/Makefile.features b/boards/z1/Makefile.features
@@ -1,4 +1,4 @@
-CPU = msp430fxyz
+CPU = msp430
 CPU_MODEL = msp430f2617
 
 # Put defined MCU peripherals here (in alphabetical order)

diff --git a/boards/z1/include/periph_conf.h b/boards/z1/include/periph_conf.h
@@ -28,12 +28,12 @@
 extern "C" {
 #endif
 
-#define CLOCK_CORECLOCK     msp430_fxyz_dco_freq
+#define CLOCK_CORECLOCK     msp430_dco_freq
 
 /**
  * @brief   Clock configuration
  */
-static const msp430_fxyz_clock_params_t clock_params = {
+static const msp430_clock_params_t clock_params = {
     .target_dco_frequency = MHZ(8),
     .lfxt1_frequency = 32768,
     .main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,
@@ -48,7 +48,7 @@ static const msp430_fxyz_clock_params_t clock_params = {
  * @{
  */
 #define TIMER_NUMOF         (1U)
-#define TIMER_BASE          (TIMER_A)
+#define TIMER_BASE          (&TIMER_A)
 #define TIMER_CHAN          (3)
 #define TIMER_ISR_CC0       (TIMERA0_VECTOR)
 #define TIMER_ISR_CCX       (TIMERA1_VECTOR)
@@ -60,15 +60,14 @@ static const msp430_fxyz_clock_params_t clock_params = {
  */
 #define UART_NUMOF          (1U)
 
-#define UART_USE_USCI
-#define UART_BASE           (USCI_0)
-#define UART_IE             (SFR->IE2)
-#define UART_IF             (SFR->IFG2)
+#define UART_BASE           (&USCI_A0)
+#define UART_IE             (IE2)
+#define UART_IF             (IFG2)
 #define UART_IE_RX_BIT      (1 << 0)
 #define UART_IE_TX_BIT      (1 << 1)
-#define UART_RX_PORT        ((msp_port_t *)PORT_3)
+#define UART_RX_PORT        (&PORT_3)
 #define UART_RX_PIN         (1 << 5)
-#define UART_TX_PORT        ((msp_port_t *)PORT_3)
+#define UART_TX_PORT        (&PORT_3)
 #define UART_TX_PIN         (1 << 4)
 #define UART_RX_ISR         (USCIAB0RX_VECTOR)
 #define UART_TX_ISR         (USCIAB0TX_VECTOR)
@@ -81,10 +80,9 @@ static const msp430_fxyz_clock_params_t clock_params = {
 #define SPI_NUMOF           (1U)
 
 /* SPI configuration */
-#define SPI_USE_USCI
-#define SPI_BASE            (USCI_0_B_SPI)
-#define SPI_IE              (SFR->IE2)
-#define SPI_IF              (SFR->IFG2)
+#define SPI_BASE            (&USCI_B0)
+#define SPI_IE              (IE2)
+#define SPI_IF              (IFG2)
 #define SPI_IE_RX_BIT       (1 << 2)
 #define SPI_IE_TX_BIT       (1 << 3)
 #define SPI_PIN_MISO        GPIO_PIN(P3, 2)