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cpu/stm32l1: add stop and standby modes, adds pm_layered #11159

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Mar 13, 2019
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cpu/stm32l1: add stop and standby modes, adds pm_layered #11159

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4dda8ab
cpu/stm32l1: add support for STOP & STAND_BY mode
fjmolinas Mar 12, 2019
e254235
cpu/stm32_common: set ULP and regulator LP during stop/standby
fjmolinas Mar 12, 2019
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3 changes: 2 additions & 1 deletion cpu/stm32_common/include/periph_cpu_common.h
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Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,8 @@ extern "C" {
* @brief Number of usable low power modes
*/
#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || defined(DOXYGEN)
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
defined(CPU_FAM_STM32L1) || defined(DOXYGEN)
#define PM_NUM_MODES (2U)

/**
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34 changes: 21 additions & 13 deletions cpu/stm32_common/periph/pm.c
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Expand Up @@ -26,7 +26,8 @@
#include "irq.h"
#include "periph/pm.h"
#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0)
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
defined(CPU_FAM_STM32L1)
#include "stmclk.h"
#endif

Expand All @@ -49,13 +50,17 @@ void pm_set(unsigned mode)
/* I just copied it from stm32f1/2/4, but I suppose it would work for the
* others... /KS */
#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0)
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
defined(CPU_FAM_STM32L1)
switch (mode) {
case STM32_PM_STANDBY:
/* Set PDDS to enter standby mode on deepsleep and clear flags */
PWR->CR |= (PWR_CR_PDDS | PWR_CR_CWUF | PWR_CR_CSBF);
/* Enable WKUP pin to use for wakeup from standby mode */
#if defined(CPU_FAM_STM32L0)
#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
/* Enable Ultra Low Power mode */
PWR->CR |= PWR_CR_ULP;

PWR->CSR |= PWR_CSR_EWUP1;
#if !defined(CPU_LINE_STM32L053xx)
/* STM32L053 only have 2 wake pins */
Expand All @@ -68,15 +73,16 @@ void pm_set(unsigned mode)
deep = 1;
break;
case STM32_PM_STOP:
#if defined(CPU_FAM_STM32L0)
/* Clear PDDS to enter stop mode on */
/*
* Regarding LPSDSR, it's up to the user to configure it :
* 0: Voltage regulator on during Deepsleep/Sleep/Low-power run mode
* 1: Voltage regulator in low-power mode during
* Deepsleep/Sleep/Low-power run mode
*/
#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
/* Clear Wakeup flag */
PWR->CR |= PWR_CR_CWUF;
/* Clear PDDS to enter stop mode on */
PWR->CR &= ~(PWR_CR_PDDS);
/* Regulator in LP mode */
PWR->CR |= PWR_CR_LPSDSR;

/* Enable Ultra Low Power mode*/
PWR->CR |= PWR_CR_ULP;
#else
/* Clear PDDS and LPDS bits to enter stop mode on */
/* deepsleep with voltage regulator on */
Expand All @@ -94,7 +100,8 @@ void pm_set(unsigned mode)
cortexm_sleep(deep);

#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0)
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
defined(CPU_FAM_STM32L1)
if (deep) {
/* Re-init clock after STOP */
stmclk_init_sysclk();
Expand All @@ -103,7 +110,8 @@ void pm_set(unsigned mode)
}

#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0)
defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L0) || \
defined(CPU_FAM_STM32L1)
void pm_off(void)
{
irq_disable();
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2 changes: 2 additions & 0 deletions cpu/stm32l1/Makefile.include
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Original file line number Diff line number Diff line change
@@ -1,5 +1,7 @@
export CPU_ARCH = cortex-m3
export CPU_FAM = stm32l1

USEMODULE += pm_layered

include $(RIOTCPU)/stm32_common/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk