cpu/stm32: add STOP and STANDBY low-power for stm32f3, unify for all stm32

[aabadie]

Contribution description

This PR adds STOP and STANDBY low-power modes to stm32f3 and since it's the last one, it also removes STM32 specific defines.

Testing procedure

Build and flash tests/periph_pm on nucleo-f303re and verify it works.

Issues/PRs references

Built on top of #9521, #11173 and #11178.

[vincent-d]

Needs rebase ;)

[aabadie]

rebased (but waiting for #11173 and #stm32f7).

Maybe this one can be merged directly without waiting for the 2 other PRs. What do you think @vincent-d ?

[vincent-d]

Code-wise this is OK, maybe the SRAM2 thing could be made configurable.

I don't have time to test it, sorry.

I'm OK with one PR for all, this is small enough.

[aabadie]

maybe the SRAM2 thing could be made configurable.

Done here: 94562f7#diff-44501824d2f98f5e4d5ee081b01fd4f0R77

Hope this is ok for you.

[vincent-d]

OK for me. Untested ACK.

[vincent-d]

@aabadie feel free to merge

[aabadie]

@aabadie feel free to merge

Thanks @vincent-d ! I'd like to have a last round of testing. Maybe @fjmolinas can find some time to give this a last try. Otherwise, it won't be before next week.

[fjmolinas]

@aabadie do you want a round of testing on all boards, I only have f4, l0, l1, l4. But not f3 with is the subject of the PR.

PROBLEMS FOUND:

L0:

• Master: when reseting after STANDBY STOPMODE consumes 3uA
• This Branch: when reseting after STANDBY STOPMODE consumes 30uA

L1:

• Master: STANDBY consumes 3uA
• This Branch consume on STANDBY 0.9 mA

F4 and L4 present no problem

[aabadie]

PROBLEMS FOUND

Thanks for testing @fjmolinas. I see nothing in the code changes of this PR that could explain such a difference, implementations for L0 and L1 are the same. Is your local master up-to-date with upstream ? (I'm wondering if another STM32 pm related PR could have introduced it, like #9521 for example)

[fjmolinas]

@aabadie you are right, I was working with an old master branch. Problems where introduced in #9521. To fix when seting PM_STOP_CONFIG for L0 and L1 do:

#define PM_STOP_CONFIG (PWR_CR_LPSDSR | PWR_CR_ULP | PWR_CR_CWUF)

WUF must be cleared before entering stop mode, and it is cleared by writing PWR_CR_CWUF. It wasn't that explicit in the datasheet since it said that WUF must be 0 but didn't explicitly talk about CWUF.

Maybe add a comment before the configs definition, it should be clear what every flag is doing.

[aabadie]

Thanks for testing and providing the fix @fjmolinas ! I pushed one last commit with it. If the comment is fine for you, I guess we can go with this one.

[fjmolinas]

@aabadie yep! go!