Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

driver - periph: Extend SPI low-level driver interface #1770

Merged
merged 2 commits into from
Oct 17, 2014
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
138 changes: 58 additions & 80 deletions cpu/sam3x8e/periph/spi.c
Original file line number Diff line number Diff line change
Expand Up @@ -91,57 +91,21 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)

default:
return -1;
break;
}

switch (dev) {
#if SPI_0_EN
case SPI_0:
spi_port = SPI_0_DEV;
/***************** PIO-Init *****************/
/* Push-pull configuration */
SPI_0_MISO_PORT->PIO_MDER &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_MDDR |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_MDER &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_MDDR |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_MDER &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_MDDR |= SPI_0_SCK_PIN;

/* With pull-up resistors */
SPI_0_MISO_PORT->PIO_PUDR &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_PUER |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_PUDR &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_PUER |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_PUDR &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_PUER |= SPI_0_SCK_PIN;

/* Clear output */
SPI_0_MISO_PORT->PIO_SODR &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_CODR |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_SODR &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_CODR |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_SODR &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_CODR |= SPI_0_SCK_PIN;

/* Peripheral Function Selection */
SPI_0_MISO_PORT->PIO_PER &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_PDR |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_PER &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_PDR |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_PER &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_PDR |= SPI_0_SCK_PIN;

/* Peripheral A */
SPI_0_MISO_PORT->PIO_ABSR &= ~SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_ABSR &= ~SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_ABSR &= ~SPI_0_SCK_PIN;

break;
#endif /* SPI_0_EN */
default:
return -2;
}

/* Configure SCK, MISO and MOSI pin */
spi_conf_pins(dev);

/***************** SPI-Init *****************/

/* Chip Select Register */
Expand Down Expand Up @@ -199,56 +163,18 @@ int spi_init_slave(spi_t dev, spi_conf_t conf, char(*cb)(char data))
spi_port = SPI_0_DEV;
NVIC_SetPriority(SPI_0_IRQ, SPI_0_IRQ_PRIO);
NVIC_EnableIRQ(SPI_0_IRQ);

/***************** PIO-Init *****************/

/* Initialize predefined NSS pin as output so it is "disabled" */
PIOA->PIO_PER |= PIO_PA28A_SPI0_NPCS0;
PIOA->PIO_OER |= PIO_PA28A_SPI0_NPCS0;

/* Push-pull configuration */
SPI_0_MISO_PORT->PIO_MDER &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_MDDR |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_MDER &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_MDDR |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_MDER &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_MDDR |= SPI_0_SCK_PIN;

/* With pull-up resistors */
SPI_0_MISO_PORT->PIO_PUDR &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_PUER |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_PUDR &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_PUER |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_PUDR &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_PUER |= SPI_0_SCK_PIN;

/* Clear output */
SPI_0_MISO_PORT->PIO_SODR &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_CODR |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_SODR &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_CODR |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_SODR &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_CODR |= SPI_0_SCK_PIN;

/* Peripheral Function Selection */
SPI_0_MISO_PORT->PIO_PER &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_PDR |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_PER &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_PDR |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_PER &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_PDR |= SPI_0_SCK_PIN;

/* Peripheral A */
SPI_0_MISO_PORT->PIO_ABSR &= ~SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_ABSR &= ~SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_ABSR &= ~SPI_0_SCK_PIN;

break;
#endif /* SPI_0_EN */
default:
return -1;
}

/* Configure SCK, MISO and MOSI pin */
spi_conf_pins(dev);

/***************** SPI-Init *****************/

/* Chip Select Register */
Expand Down Expand Up @@ -296,6 +222,58 @@ int spi_init_slave(spi_t dev, spi_conf_t conf, char(*cb)(char data))
return 0;
}

int spi_conf_pins(spi_t dev)
{
switch (dev) {
#if SPI_0_EN
case SPI_0:
/***************** PIO-Init *****************/
/* Push-pull configuration */
SPI_0_MISO_PORT->PIO_MDER &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_MDDR |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_MDER &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_MDDR |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_MDER &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_MDDR |= SPI_0_SCK_PIN;

/* With pull-up resistors */
SPI_0_MISO_PORT->PIO_PUDR &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_PUER |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_PUDR &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_PUER |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_PUDR &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_PUER |= SPI_0_SCK_PIN;

/* Clear output */
SPI_0_MISO_PORT->PIO_SODR &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_CODR |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_SODR &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_CODR |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_SODR &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_CODR |= SPI_0_SCK_PIN;

/* Peripheral Function Selection */
SPI_0_MISO_PORT->PIO_PER &= ~SPI_0_MISO_PIN;
SPI_0_MISO_PORT->PIO_PDR |= SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_PER &= ~SPI_0_MOSI_PIN;
SPI_0_MOSI_PORT->PIO_PDR |= SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_PER &= ~SPI_0_SCK_PIN;
SPI_0_SCK_PORT->PIO_PDR |= SPI_0_SCK_PIN;

/* Peripheral A */
SPI_0_MISO_PORT->PIO_ABSR &= ~SPI_0_MISO_PIN;
SPI_0_MOSI_PORT->PIO_ABSR &= ~SPI_0_MOSI_PIN;
SPI_0_SCK_PORT->PIO_ABSR &= ~SPI_0_SCK_PIN;

break;
#endif /* SPI_0_EN */
default:
return -1;
}

return 0;
}

int spi_transfer_byte(spi_t dev, char out, char *in)
{
Spi *spi_port;
Expand Down
67 changes: 45 additions & 22 deletions cpu/stm32f0/periph/spi.c
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
*
* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
* @author Hauke Petersen <mail@haukepetersen.de>
* @author Fabian Nack <nack@inf.fu-berlin.de>
*
* @}
*/
Expand All @@ -32,9 +33,6 @@
int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
{
SPI_TypeDef *spi;
GPIO_TypeDef *port;
int pin[3]; /* 3 pins: sck, miso, mosi */
int af = 0;

/* power on the SPI device */
spi_poweron(dev);
Expand All @@ -43,37 +41,21 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
#if SPI_0_EN
case SPI_0:
spi = SPI_0_DEV;
port = SPI_0_PORT;
pin[0] = SPI_0_PIN_SCK;
pin[1] = SPI_0_PIN_MISO;
pin[2] = SPI_0_PIN_MOSI;
af = SPI_0_PIN_AF;
SPI_0_PORT_CLKEN();
break;
#endif
#if SPI_1_EN
case SPI_1:
spi = SPI_1_DEV;
port = SPI_1_PORT;
pin[0] = SPI_1_PIN_SCK;
pin[1] = SPI_1_PIN_MISO;
pin[2] = SPI_1_PIN_MOSI;
af = SPI_1_PIN_AF;
SPI_0_PORT_CLKEN();
SPI_1_PORT_CLKEN();
Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Corrected to SPI_1 to use the right CLKEN call.

break;
#endif
default:
return -1;
}

/* configure pins for their correct alternate function */
for (int i = 0; i < 3; i++) {
port->MODER &= ~(3 << (pin[i] * 2));
port->MODER |= (2 << (pin[i] * 2));
int hl = (pin[i] < 8) ? 0 : 1;
port->AFR[hl] &= (0xf << ((pin[i] - (hl * 8)) * 4));
port->AFR[hl] |= (af << ((pin[i] - (hl * 8)) * 4));
}
/* configure SCK, MISO and MOSI pin */
spi_conf_pins(dev);

/* reset SPI configuration registers */
spi->CR1 = 0;
Expand Down Expand Up @@ -119,6 +101,47 @@ int spi_init_slave(spi_t dev, spi_conf_t conf, char (*cb)(char data))
return -1;
}

int spi_conf_pins(spi_t dev)
{
GPIO_TypeDef *port;
int pin[3]; /* 3 pins: sck, miso, mosi */
int af = 0;

switch (dev) {
#if SPI_0_EN
case SPI_0:
port = SPI_0_PORT;
pin[0] = SPI_0_PIN_SCK;
pin[1] = SPI_0_PIN_MISO;
pin[2] = SPI_0_PIN_MOSI;
af = SPI_0_PIN_AF;
break;
#endif
#if SPI_1_EN
case SPI_1:
port = SPI_1_PORT;
pin[0] = SPI_1_PIN_SCK;
pin[1] = SPI_1_PIN_MISO;
pin[2] = SPI_1_PIN_MOSI;
af = SPI_1_PIN_AF;
break;
#endif
default:
return -1;
}

/* configure pins for their correct alternate function */
for (int i = 0; i < 3; i++) {
port->MODER &= ~(3 << (pin[i] * 2));
port->MODER |= (2 << (pin[i] * 2));
int hl = (pin[i] < 8) ? 0 : 1;
port->AFR[hl] &= ~(0xf << ((pin[i] - (hl * 8)) * 4));
port->AFR[hl] |= (af << ((pin[i] - (hl * 8)) * 4));
}

return 0;
}

int spi_transfer_byte(spi_t dev, char out, char *in)
{
char tmp;
Expand Down
Loading