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cpu/esp32: define FLASHFILE_POS #19078
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Instead of using a fixed position of the image file in the flash, the variable `FLASHFILE_POS` is used which allows to override the default position of the image in the flash at 0x10000.
@@ -151,6 +152,19 @@ else ifeq (120m,$(FLASH_FREQ)) | |||
CFLAGS += -DCONFIG_ESPTOOLPY_FLASHFREQ_120M | |||
endif | |||
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#extend CFLAGS by the corresponding FLASH_SIZE | |||
ifeq (1,$(FLASH_SIZE)) | |||
CFLAGS += -DCONFIG_ESPTOOLPY_FLASHSIZE_1MB |
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Would it make sense to use
CFLAGS += -DCONFIG_ESPTOOLPY_FLASHSIZE_1MB | |
CFLAGS += -DCONFIG_ESPTOOLPY_FLASHSIZE_$(FLASH_SIZE)MB |
instead or is there only a fixed set of CONFIG_
defines anyway?
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These are the values declared by ESP-IDF's Kconfig.
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bors merge
Build succeeded! And happy new year! 🎉 |
@benpicco Thanks for reviewing and merging. |
19079: cpu/esp32: add periph_flashpage support r=kaspar030 a=gschorcht ### Contribution description This PR provides the `periph_flashpage` support for ESP32x SoCs. For byte-aligned read access to constant data in the flash, the MMU of all ESP32x SoCs allows to map a certain number of 64 kByte pages of the flash into the data address space of the CPU. This address space is called DROM. Normally the whole DROM address space is assigned to the section `.rodata`. The default flash layout used by all ESP32x SoCs is: | Address in Flash | Content | |:-----------------------|:-----------| | `0x0000` or `0x1000` | bootloader | | `0x8000` | parition table | | `0x9000` | `nvs` parition with WiFi data | | `0xf000` | `phy_init` partition with RF data | | `0x10000` | `factory` partition with the app image | The factory partition consists of a number of 64 kByte pages for the sections `.text`, `.rodata`, `.bss` and others. The `.text` and `rodata` sections are page-aligned and are simply mapped into the instruction address space (IROM) and the data address space (DROM), respectively. All other sections are loaded into RAM. If the `periph_flashpage` module is used, the `periph_flashpage` driver - decreases the size of the `.rodata` section in DROM address space by `CONFIG_ESP_FLASHPAGE_CAPACITY`, - adds a section `.flashpage.writable` of size `CONFIG_ESP_FLASHPAGE_CAPACITY` at the end of DROM address space that is mapped into data address space of the CPU, - reserves a region of size `CONFIG_ESP_FLASHPAGE_CAPACITY` starting from `0x10000` in front of the image partition `factory` and - moves the image partition `factory` by `CONFIG_ESP_FLASHPAGE_CAPACITY` to address `0x10000 + CONFIG_ESP_FLASHPAGE_CAPACITY`. The new flash layout is then: | Address in Flash | Content | |:-----------------------|:-----------| | `0x0000` or `0x1000` | bootloader | | `0x8000` | parition table | | `0x9000` | `nvs` parition with WiFi data | | `0xf000` | `phy_init` partition with RF data | | `0x10000` | flashpage region | | `0x10000 + CONFIG_ESP_FLASHPAGE_CAPACITY` | `factory` partition with the app image | This guarantees that the flash pages are not overwritten if a new app image with changed size is flashed. `CONFIG_ESP_FLASHPAGE_CAPACITY` has to be a multiple of 64 kBytes. ~The PR includes PR #19077 and PR #19078 for the moment to be compilable.~ ### Testing procedure The following tests should pass. ``` USEMODULE='esp_log_startup ps shell_cmds_default' BOARD=esp32-wroom-32 make -j8 -C tests/periph_flashpage flash term ``` ``` USEMODULE='esp_log_startup ps shell_cmds_default' BOARD=esp32-wroom-32 make -j8 -C tests/mtd_flashpage flash term ``` ### Issues/PRs references Depends on PR #19077 Depends on PR #19078 Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Contribution description
Instead of using a fixed position of the image file in the flash, the variable
FLASHFILE_POS
is used which allows to override the default position of the image in the flash at 0x10000.This PR is a prerequisite for the
periph_flashpage
implementation PR #19079.Testing procedure
Flashing a ESP32x SoC should work with
FLASHFILE_POS=0x20000
, for example:The bootloader output should give
00020000
as offset for thefactory
partitionand
during the load of the image.
Issues/PRs references
Prerequisite for PR #19079