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cpu/gd32v: add periph_i2c support #19201
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cpu/gd32v/periph/i2c.c
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if (state & I2C_STAT0_SMBALT_Msk) { | ||
DEBUG("SMBALERT\n"); | ||
} | ||
core_panic(PANIC_GENERAL_ERROR, "I2C FAULT"); |
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I don't get this interrupt handler.
It's just printing the ISR flags, then panics?
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Yes, it really doesn't make sense. For example, the loss of arbitration is a normal situation in multimaster environment and should not lead to a crash. But this is the implementation of STM32F1. In an intermediate version I had already removed this core_panic
, but I forgot to remove it in the final version.
When you rebase, just squash directly. |
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Do you want to keep the |
Yeah, the
I have it on my ToDo list and will continue my work as soon as I have time. At the moment the polling driver is not better or worse than the one for STM32F1. |
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Please squash
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bors merge |
Build succeeded: |
Contribution description
This PR provides the
periph_i2c
support and is one of a bunch of PRs that complete the peripheral drivers for GD32VF103.The driver is a modified version of the driver for STM32F1 with some changes that were necessary to get it working on GD32V. As for STM32F1, the driver is using polling instead of interrupts for now. It will be implemented interrupt-driven later.
Testing procedure
tests/periph_i2c
as well as a test with any I2C sensor should work. The driver was tested withtests/driver_l3gxxxx
andtests/driver_bmp180
.Issues/PRs references