cpu/gd32v: add periph_gpio_ll and periph_gpio_ll_irq support #19243
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19243: cpu/gd32v: add periph_gpio_ll and periph_gpio_ll_irq support r=maribu a=gschorcht ### Contribution description This PR provides the `periph_gpio_ll` and `periph_gpio_ll_irq` support for GD32VF103. Level triggered interrupts are emulated. `periph_gpio_ll_irq` could be split off from this PR as a separate PR if necessary. ### Testing procedure Use any GD32V board and connect PA0 -> PB0 and PA1 -> PB1 where PA is the output port and PB the input port. With these connections `tests/periph_gpio_ll` should work. ``` BOARD=sipeed-longan-nano make -j8 -C tests/periph_gpio_ll flash term ``` If necessary, change the input and output pins by setting the environment variables and connect the corresponding pins, for example for `seeedstudio-gd32` PA1 -> PB8 and PA8 -> PB9: ``` PIN_OUT_0=1 PIN_OUT_1=8 PIN_IN_0=8 PIN_IN_1=9 BOARD=seedstudio-gd32 make -j8 -C tests/periph_gpio_ll flash term ``` ### Issues/PRs references Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
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19243: cpu/gd32v: add periph_gpio_ll and periph_gpio_ll_irq support r=maribu a=gschorcht ### Contribution description This PR provides the `periph_gpio_ll` and `periph_gpio_ll_irq` support for GD32VF103. Level triggered interrupts are emulated. `periph_gpio_ll_irq` could be split off from this PR as a separate PR if necessary. ### Testing procedure Use any GD32V board and connect PA0 -> PB0 and PA1 -> PB1 where PA is the output port and PB the input port. With these connections `tests/periph_gpio_ll` should work. ``` BOARD=sipeed-longan-nano make -j8 -C tests/periph_gpio_ll flash term ``` If necessary, change the input and output pins by setting the environment variables and connect the corresponding pins, for example for `seeedstudio-gd32` PA1 -> PB8 and PA8 -> PB9: ``` PIN_OUT_0=1 PIN_OUT_1=8 PIN_IN_0=8 PIN_IN_1=9 BOARD=seedstudio-gd32 make -j8 -C tests/periph_gpio_ll flash term ``` ### Issues/PRs references 19257: pkg/lvgl: bump to 8.3.5 r=maribu a=aabadie Co-authored-by: Gunar Schorcht <gunar@schorcht.net> Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
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Contribution description
This PR provides the
periph_gpio_llandperiph_gpio_ll_irqsupport for GD32VF103. Level triggered interrupts are emulated.periph_gpio_ll_irqcould be split off from this PR as a separate PR if necessary.Testing procedure
Use any GD32V board and connect PA0 -> PB0 and PA1 -> PB1 where PA is the output port and PB the input port. With these connections
tests/periph_gpio_llshould work.If necessary, change the input and output pins by setting the environment variables and connect the corresponding pins, for example for
seeedstudio-gd32PA1 -> PB8 and PA8 -> PB9:Issues/PRs references