boards/gd32v: improve board definitions #19249
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gschorcht
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The default I2C device configuration allows to define up to two I2C devices `I2C_DEV(0)` and `I2C_DEV(1)`. `I2C_DEV(0)` is always defined if the I2C peripheral is enabled by the module `periph_spi`. The second I2C device `I2C_DEV(1)` is only defined if `I2C_DEV_1_USED` is defined by the board. This allows to use the default configuration with one or two I2C devices depending on whether other peripherals are enabled that would collide with the I2C devices.
The default SPI device configuration allows to define up to two SPI devices `SPI_DEV(0)` and `SPI_DEV(1)`. `SPI_DEV(0)` is always defined if the SPI peripheral is enabled by the module `periph_spi`. The second SPI device `SPI_DEV(1)` is only defined if `SPI_DEV_1_USED` is defined by the board. This allows to use the default configuration with one or two SPI devices depending on whether other peripherals are enabled that would collide with the SPI devices. Furthermore, the CS signal in the SPI configuration is given by a define that can be overriden with another pin if the default CS signal is connected to an unused hardware.
The ADC configuration was too complex. It was hard to follow when certain ADC lines are available. Furthermore, the order of ADC lines did depend on the use of other peripherals. Now, either the TFT display is not connected and all ADC lines are available or the TFT display is connected and the second SPI device is used so that only the first 4 ADC lines are available.
Board-specific configuration not shown any longer directly in the top level menu but within a submenu.
Available peripherals for the board are now shown ordered by RIOT peripheral names and by pins.
Available peripherals for the board are now shown ordered by RIOT peripheral names and by pins.
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Platform: RISC-V
benpicco
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Feb 6, 2023
| @@ -35,6 +35,8 @@ | |||
| #define CONFIG_CLOCK_HXTAL MHZ(8) /**< HXTAL frequency */ | |||
| #endif | |||
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| #define SPI_DEV_1_USED /**< Enable SPI_DEV(1) for the connected flash */ | |||
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When I hear connected SPI flash I see an opportunity to add an MTD device :D
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Of course, but we don't have a driver for SPI flash like the W25Q64 yet with the exception of ESP32.
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is it not just a standard SPI-NOR flash that's supported by mtd_spi_nor?
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Ah ok, mtd_spi_nor is already doing that job. I will try.
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When I hear connected SPI flash I see an opportunity to add an MTD device :D
Too bad, this is the Seeedstudio GD32 RISC-V board, which I don't have and can't order anywhere at the moment. So I can't try it out.
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19249: boards/gd32v: improve board definitions r=benpicco a=gschorcht ### Contribution description This PR provides some small improvements of the existing board definitions for GD32VF103 boards for more flexibel default configurations and documentation of the board peripherals: - Allow the remapping of SPI0 pins in SPI configuration (ae984b0) - More flexible I2C configuration (0c33758) The default I2C device configuration allows to define up to two I2C devices `I2C_DEV(0)` and `I2C_DEV(1)`. `I2C_DEV(0)` is always defined if the I2C peripheral is enabled by the module `periph_spi`. The second I2C device `I2C_DEV(1)` is only defined if `I2C_DEV_1_USED` is defined by the board. This allows to use the default configuration with one or two I2C devices depending on whether other peripherals are enabled that would collide with the I2C devices. - More flexible SPI configuration (edbf59e) The default SPI device configuration allows to define up to two SPI devices `SPI_DEV(0)` and `SPI_DEV(1)`. `SPI_DEV(0)` is always defined if the SPI peripheral is enabled by the module `periph_spi`. The second SPI device `SPI_DEV(1)` is only defined if `SPI_DEV_1_USED` is defined by the board. This allows to use the default configuration with one or two SPI devices depending on whether other peripherals are enabled that would collide with the SPI devices. Furthermore, the CS signal in the SPI configuration is given by a define that can be overriden with another pin if the default CS signal is connected to an unused hardware. - Improve ADC config for Sipeed-Longan-Nano (c9c587e) The ADC configuration was too complex. It was hard to follow when certain ADC lines are available. Furthermore, the order of ADC lines did depend on the use of other peripherals. Now, either the TFT display is not connected and all ADC lines are available or the TFT display is connected and the second SPI device is used so that only the first 4 ADC lines are available. - Improve Kconfig for Sipeed-Longan-Nano (025f4fd) Board-specific configuration not shown any longer directly in the top level menu but within a submenu. - Improve peripherals documentation (7f0d560, e24abe4) Available peripherals for the board are now documented in two tables ordered by RIOT peripheral names and by pins. Although the different changes are small and mostly related to the documentation, I could split the PR if necessary. ### Testing Green CI ### Issues/PRs references Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
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19249: boards/gd32v: improve board definitions r=benpicco a=gschorcht ### Contribution description This PR provides some small improvements of the existing board definitions for GD32VF103 boards for more flexibel default configurations and documentation of the board peripherals: - Allow the remapping of SPI0 pins in SPI configuration (ae984b0) - More flexible I2C configuration (0c33758) The default I2C device configuration allows to define up to two I2C devices `I2C_DEV(0)` and `I2C_DEV(1)`. `I2C_DEV(0)` is always defined if the I2C peripheral is enabled by the module `periph_spi`. The second I2C device `I2C_DEV(1)` is only defined if `I2C_DEV_1_USED` is defined by the board. This allows to use the default configuration with one or two I2C devices depending on whether other peripherals are enabled that would collide with the I2C devices. - More flexible SPI configuration (edbf59e) The default SPI device configuration allows to define up to two SPI devices `SPI_DEV(0)` and `SPI_DEV(1)`. `SPI_DEV(0)` is always defined if the SPI peripheral is enabled by the module `periph_spi`. The second SPI device `SPI_DEV(1)` is only defined if `SPI_DEV_1_USED` is defined by the board. This allows to use the default configuration with one or two SPI devices depending on whether other peripherals are enabled that would collide with the SPI devices. Furthermore, the CS signal in the SPI configuration is given by a define that can be overriden with another pin if the default CS signal is connected to an unused hardware. - Improve ADC config for Sipeed-Longan-Nano (c9c587e) The ADC configuration was too complex. It was hard to follow when certain ADC lines are available. Furthermore, the order of ADC lines did depend on the use of other peripherals. Now, either the TFT display is not connected and all ADC lines are available or the TFT display is connected and the second SPI device is used so that only the first 4 ADC lines are available. - Improve Kconfig for Sipeed-Longan-Nano (025f4fd) Board-specific configuration not shown any longer directly in the top level menu but within a submenu. - Improve peripherals documentation (7f0d560, e24abe4) Available peripherals for the board are now documented in two tables ordered by RIOT peripheral names and by pins. Although the different changes are small and mostly related to the documentation, I could split the PR if necessary. ### Testing Green CI ### Issues/PRs references Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
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Contribution description
This PR provides some small improvements of the existing board definitions for GD32VF103 boards for more flexibel default configurations and documentation of the board peripherals:
The default I2C device configuration allows to define up to two I2C devices
I2C_DEV(0)andI2C_DEV(1).I2C_DEV(0)is always defined if the I2C peripheral is enabled by the moduleperiph_spi. The second I2C deviceI2C_DEV(1)is only defined ifI2C_DEV_1_USEDis defined by the board. This allows to use the default configuration with one or two I2C devices depending on whether other peripherals are enabled that would collide with the I2C devices.The default SPI device configuration allows to define up to two SPI devices
SPI_DEV(0)andSPI_DEV(1).SPI_DEV(0)is always defined if the SPI peripheral is enabled by the moduleperiph_spi. The second SPI deviceSPI_DEV(1)is only defined ifSPI_DEV_1_USEDis defined by the board. This allows to use the default configuration with one or two SPI devices depending on whether other peripherals are enabled that would collide with the SPI devices.Furthermore, the CS signal in the SPI configuration is given by a define that can be overriden with another pin if
the default CS signal is connected to an unused hardware.
The ADC configuration was too complex. It was hard to follow when certain ADC lines are available. Furthermore, the order of ADC lines did depend on the use of other peripherals. Now, either the TFT display is not connected and all ADC lines are available or the TFT display is connected and the second SPI device is used so that only the first 4 ADC lines are available.
Board-specific configuration not shown any longer directly in the top level menu but within a submenu.
Available peripherals for the board are now documented in two tables ordered by RIOT peripheral names and by pins.
Although the different changes are small and mostly related to the documentation, I could split the PR if necessary.
Testing
Green CI
Issues/PRs references