boards/esp32s3-seeedstudio: Seeedstudio xiao esp32s3 board support #20973

IsikcanYilmaz · 2024-11-11T13:35:05Z

Contribution description

Support for the tiny, barebones board "Seeed Studio Xiao ESP32S3"

Testing procedure

I have not yet tested the SPI/I2C/ADC, as my main goal has been to get my board up and running as soon as possible. I assume the pin definitions etc. are correct due to their similarities to the pros3 board, and what's noted in the vendor's webpage
I'm making this PR following the advice on the contributions document 😄(Verify your concept early!) pardon if it's got obvious mistakes that werent obvious to me

…ostly copied from esp32s3-pros3 board files.

benpicco

Looks pretty straightforward!
For the naming, I'd go with esp32s3-seeedstudio-xiao, acknowledging that esp somehow has it's own naming scheme going on, but allowing for future esp32s3 boards by seeedstudio.

benpicco · 2024-11-11T22:52:23Z

boards/esp32s3-seeedstudio/include/periph_conf.h

+/** TODO all gpios are pwm in seeed esp32s3
+ * @brief Declaration of the channels for device PWM_DEV(0),
+ *        at maximum PWM_CHANNEL_NUM_DEV_MAX.
+ */
+// #ifndef PWM0_GPIOS
+// #define PWM0_GPIOS  { GPIO12, GPIO13, GPIO14, GPIO15, GPIO16 }
+// #endif
+
+/**
+ * @brief Declaration of the channels for device PWM_DEV(1),
+ *        at maximum PWM_CHANNEL_NUM_DEV_MAX.
+ */
+// #ifndef PWM1_GPIOS
+// #define PWM1_GPIOS  { GPIO6, GPIO7, GPIO21, GPIO38 }
+// #endif
+
+/** @} */
+
+/**
+ * @name    SPI configuration
+ *
+ * @note The GPIOs listed in the configuration are first initialized as SPI
+ * signals when the corresponding SPI interface is used for the first time
+ * by either calling the `spi_init_cs` function or the `spi_acquire`
+ * function. That is, they are not allocated as SPI signals before and can
+ * be used for other purposes as long as the SPI interface is not used.
+ * @{ TODO SPI pins
+ */
+// #ifndef SPI0_CTRL
+// #define SPI0_CTRL   FSPI    /**< FSPI is used as SPI_DEV(0) */
+// #endif
+// #ifndef SPI0_SCK
+// #define SPI0_SCK    GPIO36  /**< FSPI SCK (pin FSPICLK) */
+// #endif
+// #ifndef SPI0_MISO
+// #define SPI0_MISO   GPIO37  /**< FSPI MISO (pin FSPIQ) */
+// #endif
+// #ifndef SPI0_MOSI
+// #define SPI0_MOSI   GPIO35  /**< FSPI MOSI (pin FSPID) */
+// #endif
+// #ifndef SPI0_CS0
+// #define SPI0_CS0    GPIO34  /**< FSPI CS0 (pin FSPICS0) */
+// #endif
+/** @} */


Either define them or remove them 😉

I would prefer to define them at least for the SPI what schouldn't be a problem.

#define SPI0_SCK GPIO7 ... #define SPI0_MISO GPIO8 ... #define SPI0_MOSI GPIO9 ... #define SPI0_CS0 <any available GPIO, e.g. GPIO3 (D2/A2)>

Since GPIO3 (D2/A2) is also used for the SD Card Expansion port, it makes sense to use GPIO3 also for SPI0_CS0. This ensures that the SD Card Expansion Board works with with our sdcard_spi driver.

Unless you define them, the doc.txt would need to be adapted to reflect the pins that are actually usable from RIOT with the default configuration.

gschorcht · 2024-11-12T06:55:21Z

boards/esp32s3-seeedstudio/include/periph_conf.h

+ *        at maximum PWM_CHANNEL_NUM_DEV_MAX.
+ */
+// #ifndef PWM0_GPIOS
+// #define PWM0_GPIOS  { GPIO12, GPIO13, GPIO14, GPIO15, GPIO16 }


Some or at least the USER LED pin GPIO21 should be defined as PWM channel.

mguetschow · 2024-11-12T08:37:20Z

For the naming, I'd go with esp32s3-seeedstudio-xiao, acknowledging that esp somehow has it's own naming scheme going on, but allowing for future esp32s3 boards by seeedstudio.

According to https://github.com/RIOT-OS/RIOT/blob/master/doc/memos/rdm0003.md, I'd rather go with seeedstudio-xiao-esp32s3 (I know board naming has been a mess, but at least there is some common scheme now with RDM0003).

mguetschow

Thanks for your PR, much appreciated! 🎉 some comments below

mguetschow · 2024-11-12T08:39:17Z

boards/esp32s3-seeedstudio/doc.txt

+ * @brief       Support for the Seeed Studio Xiao ESP32S3
+ * @author      Isikcan 'Jon' Yilmaz <can158@gmail.com>
+
+\section esp32s3_seeedstudio Seeed Studio Xiao ESP32


Suggested change

\section esp32s3_seeedstudio Seeed Studio Xiao ESP32

\section esp32s3_seeedstudio Seeed Studio Xiao ESP32S3

?

mguetschow · 2024-11-12T08:43:25Z

boards/esp32s3-seeedstudio/include/periph_conf.h

+/** TODO all gpios are pwm in seeed esp32s3
+ * @brief Declaration of the channels for device PWM_DEV(0),
+ *        at maximum PWM_CHANNEL_NUM_DEV_MAX.
+ */
+// #ifndef PWM0_GPIOS
+// #define PWM0_GPIOS  { GPIO12, GPIO13, GPIO14, GPIO15, GPIO16 }
+// #endif
+
+/**
+ * @brief Declaration of the channels for device PWM_DEV(1),
+ *        at maximum PWM_CHANNEL_NUM_DEV_MAX.
+ */
+// #ifndef PWM1_GPIOS
+// #define PWM1_GPIOS  { GPIO6, GPIO7, GPIO21, GPIO38 }
+// #endif
+
+/** @} */
+
+/**
+ * @name    SPI configuration
+ *
+ * @note The GPIOs listed in the configuration are first initialized as SPI
+ * signals when the corresponding SPI interface is used for the first time
+ * by either calling the `spi_init_cs` function or the `spi_acquire`
+ * function. That is, they are not allocated as SPI signals before and can
+ * be used for other purposes as long as the SPI interface is not used.
+ * @{ TODO SPI pins
+ */
+// #ifndef SPI0_CTRL
+// #define SPI0_CTRL   FSPI    /**< FSPI is used as SPI_DEV(0) */
+// #endif
+// #ifndef SPI0_SCK
+// #define SPI0_SCK    GPIO36  /**< FSPI SCK (pin FSPICLK) */
+// #endif
+// #ifndef SPI0_MISO
+// #define SPI0_MISO   GPIO37  /**< FSPI MISO (pin FSPIQ) */
+// #endif
+// #ifndef SPI0_MOSI
+// #define SPI0_MOSI   GPIO35  /**< FSPI MOSI (pin FSPID) */
+// #endif
+// #ifndef SPI0_CS0
+// #define SPI0_CS0    GPIO34  /**< FSPI CS0 (pin FSPICS0) */
+// #endif
+/** @} */


Unless you define them, the doc.txt would need to be adapted to reflect the pins that are actually usable from RIOT with the default configuration.

mguetschow · 2024-11-12T08:44:29Z

boards/esp32s3-seeedstudio/include/periph_conf.h

+/**
+ * @name Camera configurations and pins
+ * TODO also mic pins
+ */
+


Suggested change

/**

* @name Camera configurations and pins

* TODO also mic pins

*/

The board doesn't have those, right?

IsikcanYilmaz · 2024-11-12T08:57:14Z

sorry folks, maybe this PR was more premature than i thought.

riot-ci · 2024-11-12T12:48:48Z

Murdock results

❌ FAILED

1285c4c boards/esp32s3-seeedstudio: seeedstudio xiao esp32s3 board support. mostly copied from esp32s3-pros3 board files.

Success	Failures	Total	Runtime
33	0	553	01m:19s

Artifacts

IsikcanYilmaz requested review from leandrolanzieri, jia200x, MrKevinWeiss and gschorcht as code owners November 11, 2024 13:35

github-actions bot added Area: doc Area: Documentation Area: boards Area: Board ports Area: Kconfig Area: Kconfig integration labels Nov 11, 2024

IsikcanYilmaz force-pushed the board/esp32s3-seeedstudio branch from ec228ec to 03b5696 Compare November 11, 2024 13:36

boards/esp32s3-seeedstudio: seeedstudio xiao esp32s3 board support. m…

1285c4c

…ostly copied from esp32s3-pros3 board files.

IsikcanYilmaz force-pushed the board/esp32s3-seeedstudio branch from 38765d8 to 1285c4c Compare November 11, 2024 14:00

benpicco reviewed Nov 11, 2024

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gschorcht reviewed Nov 12, 2024

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mguetschow added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label Nov 12, 2024

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boards/esp32s3-seeedstudio: Seeedstudio xiao esp32s3 board support #20973

boards/esp32s3-seeedstudio: Seeedstudio xiao esp32s3 board support #20973

IsikcanYilmaz commented Nov 11, 2024

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riot-ci commented Nov 12, 2024

	\section esp32s3_seeedstudio Seeed Studio Xiao ESP32
	\section esp32s3_seeedstudio Seeed Studio Xiao ESP32S3

boards/esp32s3-seeedstudio: Seeedstudio xiao esp32s3 board support #20973

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boards/esp32s3-seeedstudio: Seeedstudio xiao esp32s3 board support #20973

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IsikcanYilmaz commented Nov 11, 2024

Contribution description

Testing procedure

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IsikcanYilmaz commented Nov 12, 2024

riot-ci commented Nov 12, 2024

Murdock results

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