stm32l1/lpm: low power implementation for stm32l1

[shady33]

The Low power modes implementation for the STM32L1 series.

[DipSwitch]

Sorry, took a while... Seems oke (just as any other STM32) but I don't have a board to test.

[DipSwitch]

Low power run mode cannot be entered if the system clock speed exceeds fMSI 1 I guess this is 4.194 MHz but all boards are currently using the HSI as clock source and running at >= 32MHz. Also to enable LPRUN the Vcore must not exceed Vcore range 2 which means the CPU clock may not run faster dan 16MHz.

[jia200x]

@DipSwitch @shady33 do you think is OK to change Vcore and system frequency inside the lpm_arch_set? It can be reverted latter in the lpm_arch_awake function.

I noticed the enter sleep function in the stm32l1 hal implementation 1 doesn't change frequency nor Vcore range. I'm not sure if those conditions are expected before the sleep call.

[DipSwitch]

Please have a look at: https://github.com/RIOT-OS/RIOT/blob/master/cpu/stm32f4/lpm_arch.c#L31 about how the lpm_arch could be implemented. Using the low power features of the STM32L1 are very board specific and cannot be applied to all boards just like this. I would advice to make them configurable by defining a set of macro's which can be set in board.h of the board implementation.

• IDLE should be something like 5.3.5 Sleep mode this is the default mode and RIOT expects that all peripheral stay enabled

[shady33]

The f4 has only 3 modes, the l1 has two additional modes for Low Power. What is the problem with the current implementation ?

[DipSwitch]

Edited

[shady33]

I was planning to define the LPM modes in the following way:
LPM_IDLE : STM Sleep mode
LPM_SLEEP : STM Stop mode
LPM_POWERDOWN : STM Standby mode
LPM_OFF : STM Standby mode

And with LOW_POWER_MODES_ENABLED
LPM_IDLE : STM Sleep mode
LPM_SLEEP : STM Low Power sleep mode
LPM_POWERDOWN : STM Stop mode
LPM_OFF : STM Standby mode

Or is there no need for the low power modes at all?

[kYc0o]

Feature freeze -> postponed.

[miri64]

Postponed due to Feature Freeze.

[jia200x]

Hi @shady33

I was about to start the lpm implementation for STM32L1 but noticed this PR.
What's the status?

We are very interested in this feature for a battery based IoT network. If there's something we can do to help just let me know.

Cheers!

[shady33]

Hi @jia200x

Unfortunately, I don't have access to STM32L1 boards. So, I can't test out the code. But I had done most of the work. You can see if it fits with Riot's rules. If it does you could just pull it or feel free to close this PR as I may not be able to test it.

Cheers!

[jia200x]

Hi @shady33

Nice! I have some NZ32-151RC boards I can use. Tomorrow I will give it a try.
Cheers!

[PeterKietzmann]

@jia200x did you?

[kaspar030]

This'll need to be reworked on top of #6160.

[miri64]

(#6160 got merged)

[smlng]

any new here? Is this adaptable to #6160 or start from scratch and close this one?

[aabadie]

ping, since #6160 has been merged, this one needs adaption

[smlng]

LPM was remove with #6160, close as memo like other PRs