cpu+board: Add support for NXP Kinetis KW41Z and FRDM-KW41Z development board

boards/common/frdm/dist/openocd-klx.cfg

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+#
+# NXP Kinetis Freedom developer board
+#
+# OpenSDA is the on-board debugger, some boards have a CMSIS-DAP compatible
+# interface, other boards comes pre-flashed with a Segger J-Link compatible
+# firmware. The OpenSDA controller can be re-flashed to provide either of the two.
+# Both interfaces work with OpenOCD, but we need to tell which one we have on
+# our debugger.
+
+# CMSIS-DAP (DAPLink) compatible OpenSDA firmware binary images can be found at:
+# http://www.nxp.com/opensda
+
+# Kinetis L only supports SWD
+transport select swd
+
+# Kinetis L series CPUs
+source [find target/klx.cfg]
+
+reset_config srst_only
+
+$_TARGETNAME configure -event gdb-attach {
+  halt
+}
+$_TARGETNAME configure -rtos auto

boards/frdm-kw41z/Makefile

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+MODULE = board
+
+include $(RIOTBASE)/Makefile.base

boards/frdm-kw41z/Makefile.dep

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+ifneq (,$(filter saul_default,$(USEMODULE)))
+  USEMODULE += saul_gpio
+  USEMODULE += saul_adc
+endif
+
+include $(RIOTCPU)/kinetis/Makefile.dep

boards/frdm-kw41z/Makefile.features

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+# Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_adc
+FEATURES_PROVIDED += periph_i2c
+FEATURES_PROVIDED += periph_rtc
+FEATURES_PROVIDED += periph_rtt
+FEATURES_PROVIDED += periph_spi
+FEATURES_PROVIDED += periph_timer
+FEATURES_PROVIDED += periph_uart
+
+# The board MPU family (used for grouping by the CI system)
+FEATURES_MCU_GROUP = cortex_m0_2
+
+include $(RIOTCPU)/kinetis/Makefile.features
+# Remove this line after TRNG driver is implemented
+FEATURES_PROVIDED := $(filter-out periph_hwrng,$(FEATURES_PROVIDED))

boards/frdm-kw41z/Makefile.include

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+# define the cpu used by the board
+export CPU = kinetis
+export CPU_MODEL = mkw41z512vht4
+
+# OpenOCD v0.10.0-dev (current development version) or later is required for
+# flashing KW41Z devices
+# See http://openocd.zylin.com/#/c/4104/ for the upstreaming process
+export USE_OLD_OPENOCD ?= 0
+# This board comes with OpenSDA configured for JLink compatibility
+export DEBUG_ADAPTER ?= jlink
+
+# Include default FRDM board config
+include $(RIOTBOARD)/common/frdm/Makefile.include

boards/frdm-kw41z/board.c

@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2017 Eistec AB
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @ingroup     boards_frdm-kw41z
+ * @{
+ *
+ * @file
+ * @brief       Board specific initialization for the FRDM-KW41Z
+ *
+ * @author      Joakim Nohlgård <joakim.nohlgard@eistec.se>
+ *
+ * @}
+ */
+
+#include "board.h"
+#include "periph/gpio.h"
+#include "periph/rtt.h"
+
+void board_init(void)
+{
+    /* initialize the CPU core */
+    cpu_init();
+
+#if MODULE_XTIMER && !(KINETIS_XTIMER_SOURCE_PIT)
+    /* Start the RTT, used as time base for xtimer when using LPTMR backend */
+    rtt_init();
+#endif
+
+    /* initialize and turn off LEDs */
+    gpio_init(LED0_PIN, GPIO_OUT);
+    gpio_set(LED0_PIN);
+    gpio_init(LED1_PIN, GPIO_OUT);
+    gpio_set(LED1_PIN);
+    gpio_init(LED2_PIN, GPIO_OUT);
+    gpio_set(LED2_PIN);
+    gpio_init(LED3_PIN, GPIO_OUT);
+    gpio_set(LED3_PIN);
+}

boards/frdm-kw41z/include/adc_params.h

@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2017 Eistec AB
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup   boards_frdm_kw41z
+ * @{
+ *
+ * @file
+ * @brief     Board specific configuration of direct mapped ADC
+ *
+ * @author    Joakim Nohlgård <joakim.nohlgard@eistec.se>
+ */
+
+#ifndef ADC_PARAMS_H
+#define ADC_PARAMS_H
+
+#include "board.h"
+#include "saul/periph.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief    ADC configuration
+ */
+static const  saul_adc_params_t saul_adc_params[] =
+{
+    {
+        .name = "coretemp",
+        .line = ADC_LINE(0),
+        .res  = ADC_RES_16BIT,
+    },
+    {
+        .name = "corebandgap",
+        .line = ADC_LINE(1),
+        .res  = ADC_RES_16BIT,
+    },
+    {
+        .name = "corevrefh",
+        .line = ADC_LINE(2),
+        .res  = ADC_RES_16BIT,
+    },
+    {
+        .name = "corevrefl",
+        .line = ADC_LINE(3),
+        .res  = ADC_RES_16BIT,
+    },
+    {
+        .name = "dcdcvbat",
+        .line = ADC_LINE(4),
+        .res  = ADC_RES_16BIT,
+    },
+    {
+        .name = "ADC0_DP-DM",
+        .line = ADC_LINE(5),
+        .res  = ADC_RES_16BIT,
+    },
+    {
+        .name = "ADC0_SE2",
+        .line = ADC_LINE(6),
+        .res  = ADC_RES_16BIT,
+    },
+    {
+        .name = "ADC0_SE3",
+        .line = ADC_LINE(7),
+        .res  = ADC_RES_16BIT,
+    },
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ADC_PARAMS_H */
+/** @} */

boards/frdm-kw41z/include/board.h

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+/*
+ * Copyright (C) 2017 Eistec AB
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @defgroup    boards_frdm-kw41z Freescale FRDM-KW41Z Board
+ * @ingroup     boards
+ * @brief       Board specific implementations for the FRDM-KW41Z
+ * @{
+ *
+ * @file
+ * @brief       Board specific definitions for the FRDM-KW41Z
+ *
+ * @author      Joakim Nohlgård <joakim.nohlgard@eistec.se>
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+#include "cpu.h"
+#include "periph_conf.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @name    LED pin definitions and handlers
+ * @{
+ */
+#define LED0_PIN            GPIO_PIN(PORT_B,  0)
+#define LED0_MASK           (1 << 0)
+#define LED0_ON             (GPIOB->PCOR = LED0_MASK)
+#define LED0_OFF            (GPIOB->PSOR = LED0_MASK)
+#define LED0_TOGGLE         (GPIOB->PTOR = LED0_MASK)
+#define LED1_PIN            GPIO_PIN(PORT_C,  1)
+#define LED1_MASK           (1 << 1)
+#define LED1_ON             (GPIOC->PCOR = LED1_MASK)
+#define LED1_OFF            (GPIOC->PSOR = LED1_MASK)
+#define LED1_TOGGLE         (GPIOC->PTOR = LED1_MASK)
+#define LED2_PIN            GPIO_PIN(PORT_A, 19)
+#define LED2_MASK           (1 << 19)
+#define LED2_ON             (GPIOA->PCOR = LED2_MASK)
+#define LED2_OFF            (GPIOA->PSOR = LED2_MASK)
+#define LED2_TOGGLE         (GPIOA->PTOR = LED2_MASK)
+#define LED3_PIN            GPIO_PIN(PORT_A, 18)
+#define LED3_MASK           (1 << 18)
+#define LED3_ON             (GPIOA->PCOR = LED3_MASK)
+#define LED3_OFF            (GPIOA->PSOR = LED3_MASK)
+#define LED3_TOGGLE         (GPIOA->PTOR = LED3_MASK)
+/** @} */
+
+/**
+ * @name    xtimer configuration
+ * @{
+ */
+#if KINETIS_XTIMER_SOURCE_PIT
+/* PIT xtimer configuration */
+#define XTIMER_DEV                  (TIMER_PIT_DEV(0))
+#define XTIMER_CHAN                 (0)
+/* Default xtimer settings should work on the PIT */
+#else
+/* LPTMR xtimer configuration */
+#define XTIMER_DEV                  (TIMER_LPTMR_DEV(0))
+#define XTIMER_CHAN                 (0)
+/* LPTMR is 16 bits wide and runs at 32768 Hz (clocked by the RTC) */
+#define XTIMER_WIDTH                (16)
+#define XTIMER_BACKOFF              (5)
+#define XTIMER_ISR_BACKOFF          (5)
+#define XTIMER_OVERHEAD             (4)
+#define XTIMER_HZ                   (32768ul)
+#endif
+/** @} */
+
+/**
+ * @name    NOR flash hardware configuration
+ * @{
+ */
+#define FRDM_NOR_SPI_DEV               SPI_DEV(0)
+#define FRDM_NOR_SPI_CLK               SPI_CLK_5MHZ
+#define FRDM_NOR_SPI_CS                SPI_HWCS(0) /**< Flash CS pin */
+/** @} */
+
+/**
+ * @brief   Initialize board specific hardware, including clock, LEDs and standard I/O
+ */
+void board_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H */
+/** @} */

boards/frdm-kw41z/include/gpio_params.h

@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2017 SKF AB
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup   boards_frdm_kw41z
+ * @{
+ *
+ * @file
+ * @brief     Board specific configuration of direct mapped GPIOs
+ *
+ * @author    Joakim Nohlgård <joakim.nohlgard@eistec.se>
+ */
+
+#ifndef GPIO_PARAMS_H
+#define GPIO_PARAMS_H
+
+#include "board.h"
+#include "saul/periph.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief    LED configuration
+ */
+static const  saul_gpio_params_t saul_gpio_params[] =
+{
+    /* These LEDs are marked on the board silkscreen with "LED3" for the red LED,
+     * and "LED4" for the RGB LED, hence the names for the SAUL actuators don't
+     * match the LEDx_PIN macros in board.h */
+    /* LED1 and LED2 on the board are wired to the target CPU reset pin, and the
+     * power supply line and are not software controllable */
+    {
+        .name = "LED3",
+        .pin = LED0_PIN,
+        .mode = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name = "LED4_R",
+        .pin = LED1_PIN,
+        .mode = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name = "LED4_G",
+        .pin = LED2_PIN,
+        .mode = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name = "LED4_B",
+        .pin = LED3_PIN,
+        .mode = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name = "SW3",
+        .pin = GPIO_PIN(PORT_C, 4),
+        .mode = GPIO_IN_PU
+    },
+    {
+        .name = "SW4",
+        .pin = GPIO_PIN(PORT_C, 5),
+        .mode = GPIO_IN_PU
+    },
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* GPIO_PARAMS_H */
+/** @} */