Merge "Prepare to upstream kernel call lowering" into amd-common

ROCm · Aug 19, 2019 · a28a3a7 · a28a3a7
2 parents 7d9ae4d + ceea654
commit a28a3a7
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diff --git a/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll b/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
@@ -1,17 +1,21 @@
-; XFAIL: *
-; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN %s
 
-; FIXME: It should be invalid IR to have a call to a kernel, but this
-; is currently relied on, but should be eliminated before codegen.
+; GCN: callee_kernel:
+; GCN: s_endpgm
+; GCN: __amdgpu_callee_kernel_kernel_body
+; GCN: s_setpc_b64
 define amdgpu_kernel void @callee_kernel(i32 addrspace(1)* %out) #0 {
 entry:
   store volatile i32 0, i32 addrspace(1)* %out
   ret void
 }
 
-; Make sure there's no crash when the callsite calling convention
-; doesn't match.
-; CHECK: LLVM ERROR: invalid call to entry function
+; GCN: caller_kernel:
+; GCN: s_getpc_b64 s{{\[}}[[LO1:[0-9]+]]:[[HI1:[0-9]+]]]
+; GCN: s_add_u32 s[[LO2:[0-9]+]], s[[LO1]], __amdgpu_callee_kernel_kernel_body@rel32@lo+4
+; GCN: s_addc_u32 s[[HI2:[0-9]+]], s[[HI1]], __amdgpu_callee_kernel_kernel_body@rel32@hi+4
+; GCN: s_swappc_b64 s[{{[0-9:]+}}], s{{\[}}[[LO2]]:[[HI2]]]
+; GCN: s_endpgm
 define amdgpu_kernel void @caller_kernel(i32 addrspace(1)* %out) #0 {
 entry:
   call void @callee_kernel(i32 addrspace(1)* %out)

diff --git a/test/CodeGen/AMDGPU/call-to-kernel.ll b/test/CodeGen/AMDGPU/call-to-kernel.ll
@@ -1,15 +1,21 @@
-; XFAIL: *
-; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN %s
 
-; FIXME: It should be invalid IR to have a call to a kernel, but this
-; is currently relied on, but should be eliminated before codegen.
+; GCN: callee_kernel:
+; GCN: s_endpgm
+; GCN: __amdgpu_callee_kernel_kernel_body
+; GCN: s_setpc_b64
 define amdgpu_kernel void @callee_kernel(i32 addrspace(1)* %out) #0 {
 entry:
   store volatile i32 0, i32 addrspace(1)* %out
   ret void
 }
 
-; CHECK: LLVM ERROR: Unsupported calling convention for call
+; GCN: caller_kernel:
+; GCN: s_getpc_b64 s{{\[}}[[LO1:[0-9]+]]:[[HI1:[0-9]+]]]
+; GCN: s_add_u32 s[[LO2:[0-9]+]], s[[LO1]], __amdgpu_callee_kernel_kernel_body@rel32@lo+4
+; GCN: s_addc_u32 s[[HI2:[0-9]+]], s[[HI1]], __amdgpu_callee_kernel_kernel_body@rel32@hi+4
+; GCN: s_swappc_b64 s[{{[0-9:]+}}], s{{\[}}[[LO2]]:[[HI2]]]
+; GCN: s_endpgm
 define amdgpu_kernel void @caller_kernel(i32 addrspace(1)* %out) #0 {
 entry:
   call amdgpu_kernel void @callee_kernel(i32 addrspace(1)* %out)