Add SHA-512 support for RV32

sha2/src/sha512.rs

@@ -7,7 +7,7 @@ cfg_if::cfg_if! {
         mod x86;
         use x86::compress;
     } else if #[cfg(all(
-        target_arch = "riscv64",
+        any(target_arch = "riscv32", target_arch = "riscv64"),
         sha2_backend = "riscv-zknh"
     ))] {
         mod riscv64_zknh;

sha2/src/sha512/riscv64_zknh.rs → sha2/src/sha512/riscv_zknh.rs

@@ -36,6 +36,34 @@ fn read_rk<const IDX: usize>() -> u64 {
     res
 }
 
+#[cfg(target_arch = "riscv32")]
+unsafe fn sha512sum0(x: u64) -> u64 {
+    let a = sha512sum0r((x >> 32) as u32, x as u32);
+    let b = sha512sum0r(x as u32, (x >> 32) as u32);
+    ((a as u64) << 32) | (b as u64)
+}
+
+#[cfg(target_arch = "riscv32")]
+unsafe fn sha512sum1(x: u64) -> u64 {
+    let a = sha512sum1r((x >> 32) as u32, x as u32);
+    let b = sha512sum1r(x as u32, (x >> 32) as u32);
+    ((a as u64) << 32) | (b as u64)
+}
+
+#[cfg(target_arch = "riscv32")]
+unsafe fn sha512sig0(x: u64) -> u64 {
+    let a = sha512sig0h((x >> 32) as u32, x as u32);
+    let b = sha512sig0l(x as u32, (x >> 32) as u32);
+    ((a as u64) << 32) | (b as u64)
+}
+
+#[cfg(target_arch = "riscv32")]
+unsafe fn sha512sig1(x: u64) -> u64 {
+    let a = sha512sig1h((x >> 32) as u32, x as u32);
+    let b = sha512sig1l(x as u32, (x >> 32) as u32);
+    ((a as u64) << 32) | (b as u64)
+}
+
 macro_rules! round {
     (
         $a: ident, $b: ident, $c: ident, $d: ident,