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Merge pull request #19 from UQ-PAC/add-missing-empty-bin
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Miscellaneous fixes and adding instructions

    fix: replace lognot with lnot
    LDURHH, LDURSB, LDURSH, LDURSW
    RBIT (and reverse-bits helper)
    UMSUBL,SMSUBL,UMADDL,SMADDL
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ailrst authored Jul 20, 2022
2 parents 5a7342c + 4ca0f1c commit 1cb9933
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Showing 5 changed files with 47 additions and 1 deletion.
4 changes: 4 additions & 0 deletions plugins/arm/semantics/aarch64-arithmetic.lisp
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Expand Up @@ -100,6 +100,10 @@

(defun SMADDLrrr (rd rn rm ra) (set$ rd (cast-signed 64 (+ ra (* (cast-signed 64 rn) (cast-signed 64 rm))))))

(defun UMSUBLrrr (rd rn rm ra) (set$ rd (cast-low 64 (- ra (* (cast-signed 64 rn) (cast-signed 64 rm))))))

(defun SMSUBLrrr (rd rn rm ra) (set$ rd (cast-signed 64 (- ra (* (cast-signed 64 rn) (cast-signed 64 rm))))))

(defun UMULHrr (rd rn rm)
"multiplies rn and rm together and stores the high 64 bits of the resulting
128-bit value to the register rd"
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31 changes: 31 additions & 0 deletions plugins/arm/semantics/aarch64-data-movement.lisp
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Expand Up @@ -174,6 +174,37 @@
"(LDURBBi wt base simm) loads a byte from the address calculated from a base register and signed immediate offset and stores it in the 32 bit destination register. NOTE: does not HaveMTE2Ext(), SetTagCheckedInstruction(), CheckSPAlignment()"
(setw wt (load-byte (+ base simm))))

;; LDURH

(defun LDURHHi (rt rn simm)
(setw rt (cast-unsigned 32 (load-dbyte (+ rn simm)))))

;; LDURSB

(defun LDURSBWi (rt rn simm)
"LDURSBWi loads a byte from the address (rn + simm) and sign-extends it to write it to rt"
(setw rt (cast-signed 32 (load-byte (+ rn simm)))))

(defun LDURSBXi (rt rn simm)
"LDURSBXi loads a byte from the address (rn + simm) and sign-extends it to write it to rt"
(set$ rt (cast-signed 64 (load-byte (+ rn simm)))))

;; LDURSH

(defun LDURSHWi (rt rn simm)
"LDURSBWi loads a halfword from the address (rn + simm) and sign-extends it to write it to rt"
(setw rt (cast-signed 32 (load-dbyte (+ rn simm)))))

(defun LDURSHXi (rt rn simm)
"LDURSBXi loads a halfword from the address (rn + simm) and sign-extends it to write it to rt"
(set$ rt (cast-signed 64 (load-dbyte (+ rn simm)))))

;; LDURSW

(defun LDURSWi (rt rn simm)
"LDURSBXi loads a word from the address (rn + simm) and sign-extends it to write it to rt"
(set$ rt (cast-signed 64 (load-hword (+ rn simm)))))

;; LDUR

(defmacro LDUR*i (rt base simm setf mem-load)
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8 changes: 8 additions & 0 deletions plugins/arm/semantics/aarch64-helper.lisp
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Expand Up @@ -9,6 +9,14 @@

(defun word () (word-width))

(defun _reverse-bits (bits i)
(if (> i 0)
(concat (_reverse-bits bits (- i 1)) (select i bits))
(select i bits)))

(defun reverse-bits (bits)
(_reverse-bits bits (- (word-width bits) 1)))

(defun shift-encoded (rm off)
"(shift-encoded rm off) decodes the 8-bit shift value
into its type and offset, and shifts rm accordingly."
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3 changes: 3 additions & 0 deletions plugins/arm/semantics/aarch64-logical.lisp
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Expand Up @@ -146,3 +146,6 @@

(defun RORVXr (rd rn rm) (SHIFT*r set$ rotate-right 64 rd rn rm))
(defun RORVWr (rd rn rm) (SHIFT*r setw rotate-right 32 rd rn rm))

(defun RBITXr (rd rn) (set$ rd (reverse-bits rn)))
(defun RBITWr (rd rn) (setw rd (reverse-bits rn)))
2 changes: 1 addition & 1 deletion plugins/arm/semantics/aarch64-special.lisp
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Expand Up @@ -26,4 +26,4 @@
(intrinsic 'undefined-instruction))

(defun BRK (option)
(intrinsic (symbol-concat 'software-breakpoint- (bitvec-to-symbol option '0x))))
(intrinsic 'software-breakpoint option))

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