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feat(examples/vhdl/array_axis_vcs): do not overwrite set_sim_option
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umarcor committed Apr 14, 2019
1 parent 9b1bba8 commit 0668430
Showing 1 changed file with 5 additions and 6 deletions.
11 changes: 5 additions & 6 deletions examples/vhdl/array_axis_vcs/run.py
Original file line number Diff line number Diff line change
Expand Up @@ -22,17 +22,16 @@

# vu.set_sim_option('modelsim.init_files.after_load',['runall_addwave.do'])

# This can be executed externally, should C sources be more complex than a single file.
c_nobj = join(root, 'src/test/stubs.o')
print(os.popen('gcc -fPIC -rdynamic -c '+join(root, 'src/**/stubs.c')+' -o '+c_nobj).read())

vu.set_sim_option("ghdl.elab_flags", ["-Wl,"+c_nobj])

c_obj = join(root, 'src/test/main.o')
# This can be executed externally, should C sources be more complex than a single file.
print(os.popen('gcc -fPIC -rdynamic -c '+join(root, 'src/**/main.c')+' -o '+c_obj).read())

for tb in lib.get_test_benches(pattern='*tb_py_*', allow_empty=False):
tb.set_sim_option("ghdl.elab_flags", ["-Wl,"+c_nobj], overwrite=False)

for tb in lib.get_test_benches(pattern='*tb_c_*', allow_empty=False):
# FIXME: We don't want to replace all the elab flags. We just want to add one.
tb.set_sim_option("ghdl.elab_flags", ["-Wl,"+c_obj])
tb.set_sim_option("ghdl.elab_flags", ["-Wl,"+c_obj], overwrite=False)

vu.main()

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