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Hi guys, thank you for your valuable work. Once again, I get another but only when I compile it 😅: when I run VUnit test. The ModelSim spits out a warning regarding the id_pkg.
** Warning: C:\Repo\delta_firmware\.venv\Lib\site-packages\vunit\vhdl\data_types\src\id_pkg.vhd(351): (vcom-1246) Range 1 to 0 is null.
It seems to be a valid construct in VHDL if someone wants a NULL array.
5.2.1 General
[...]
A range specifies a subset of values of a scalar type. A range is said to be a null range if the specified subset is empty.
The range L to R is called an ascending range; if L > R, then the range is a null range. The range L downto R is called a descending range; if L < R, then the range is a null range. L is called the left bound of the range, and R is called the right bound of the range. The lower bound of a range is the left bound if the range is ascending or the right bound if the range is descending. The upper bound of a range is the right bound if the range is ascending or the left bound if the range is descending. The value V is said to belong to the range if the relations (lower bound <= V) and (V <= upper bound) are both true. The operators >, <, and <= in the preceding definitions are the predefined operators of the applicable scalar type.
[...]
5.3.2.2 Index constraints and discrete ranges
[...]
An array constraint of the first form is compatible with the type if, and only if, the constraint defined by each discrete range is compatible with the corresponding index subtype and the array element constraint, if present, is compatible with the element subtype of the type. If any of the discrete ranges defines a null range, any array thus constrained is a null array, having no elements. An array value satisfies an index constraint if at each index position the array value and the index constraint have the same index range. (Note, however, that assignment and certain other operations on arrays involve an implicit subtype conversion.)
[...]
8.5 Slice names
[...]
The bounds of the discrete range define those of the slice and shall be of the type of the index of the array. The slice is a null slice if the discrete range is a null range. It is an error if the direction of the discrete range is not the same as that of the index range of the array denoted by the prefix of the slice name.
For the evaluation of a name that is a slice, the prefix and the discrete range are evaluated. It is an error if either of the bounds of the discrete range does not belong to the index range of the prefixing array, unless the slice is a null slice. (The bounds of a null slice need not belong to the subtype of the index.)
[...]
I think here we can't do anything but I'd guess writing a comment that this construct is intentional would avoid this kind of issues being reported.
impurefunction get_lineage(id : id_t) return id_vec_t isimpurefunction get_lineage_i(id : id_t) return id_vec_t isvariable parts : lines_t := split(full_name(id), ":");
constant length : positive:= parts'length+1;
variable lineage : id_vec_t(1to length);
variable tmp_id : id_t := id;
beginfor idx in length downto1loop
lineage(idx) := tmp_id;
exitwhen tmp_id = root_id;
tmp_id := get_parent(tmp_id);
endloop;
return lineage;
end;
beginif id = null_id then
null_id_failure("get_lineage");
return (1to0=> null_id); -- This one causes the warningelsif id = root_id thenreturn (1=> root_id);
endif;
return get_lineage_i(id);
end;
The text was updated successfully, but these errors were encountered:
Hi guys, thank you for your valuable work. Once again, I get another but only when I compile it 😅: when I run VUnit test. The ModelSim spits out a warning regarding the
id_pkg
.** Warning: C:\Repo\delta_firmware\.venv\Lib\site-packages\vunit\vhdl\data_types\src\id_pkg.vhd(351): (vcom-1246) Range 1 to 0 is null.
It seems to be a valid construct in VHDL if someone wants a NULL array.
I think here we can't do anything but I'd guess writing a comment that this construct is intentional would avoid this kind of issues being reported.
The text was updated successfully, but these errors were encountered: