Remove simulation outfiles

WISDEM · Nov 6, 2019 · 4afacf3 · 4afacf3
1 parent a49406a
commit 4afacf3
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Showing 4 changed files with 8 additions and 0 deletions.
diff --git a/.gitignore b/.gitignore
@@ -24,10 +24,18 @@ _build
 *.sum
 *.ech
 *.dbg
+*.out
+*.outb
+*.dbg
 
 # Fortran files
 *.85
 
+# Binaries
+*.dylib
+*.so
+*.dll
+
 # Other
 .pytest_cache
 examples/cp_ct_cq_lut.p

diff --git a/Test_Cases/5MW_Baseline/DISCON/DISCON.dll b/Test_Cases/5MW_Baseline/DISCON/DISCON.dll
diff --git a/Test_Cases/5MW_Baseline/DISCON/DISCON_OC3Hywind.dll b/Test_Cases/5MW_Baseline/DISCON/DISCON_OC3Hywind.dll
diff --git a/examples/test_controller/DISCON.dll b/examples/test_controller/DISCON.dll