v128.load32_zero and v128.load64_zero instructions

WebAssembly · Oct 17, 2020 · 6021a4e · 6021a4e
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diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md
@@ -222,3 +222,5 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `i32x4.trunc_sat_f32x4_u`  |    `0xf9`| -                  |
 | `f32x4.convert_i32x4_s`    |    `0xfa`| -                  |
 | `f32x4.convert_i32x4_u`    |    `0xfb`| -                  |
+| `v128.load32_zero`         |    `0xfc`| -                  |
+| `v128.load64_zero`         |    `0xfd`| -                  |
diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md
@@ -190,6 +190,8 @@
 | `i32x4.trunc_sat_f32x4_u`  |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `f32x4.convert_i32x4_s`    |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `f32x4.convert_i32x4_u`    |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
+| `v128.load32_zero`         |                           |                    |                    |                    |                    |
+| `v128.load64_zero`         |                           |                    |                    |                    |                    |
 
 [1] Tip of tree LLVM as of May 20, 2020
 

diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md
@@ -12,6 +12,8 @@
 | v128.load32_splat  | 0x09   |
 | v128.load64_splat  | 0x0a   |
 | v128.store         | 0x0b   |
+| v128.load32_zero   | 0xfc   |
+| v128.load64_zero   | 0xfd   |
 
 | Basic operation | opcode |
 | ----------------| ------ |

diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md
@@ -766,6 +766,24 @@ def S.load(memarg):
     return S.from_bytes(memory[memarg.offset:memarg.offset + 16])
 ```
 
+### Load and Zero-Pad
+
+* `v128.load32_zero(memarg) -> v128`
+* `v128.load64_zero(memarg) -> v128`
+
+Load a single 32-bit or 64-bit element into the lowest bits of a `v128` vector,
+and initialize all other bits of the `v128` vector to zero.
+
+```python
+def S.load32_zero(memarg):
+    return S.from_bytes(memory[memarg.offset:memarg.offset + 4])
+```
+
+```python
+def S.load64_zero(memarg):
+    return S.from_bytes(memory[memarg.offset:memarg.offset + 8])
+```
+
 ### Load and Splat
 
 * `v128.load8_splat(memarg) -> v128`