Skip to content
This repository has been archived by the owner on Dec 22, 2021. It is now read-only.

Commit

Permalink
i32x4.dot_i16x8_s and i32x4.dot_i16x8_add_s instructions
Browse files Browse the repository at this point in the history
  • Loading branch information
Maratyszcza committed Feb 15, 2020
1 parent 77e7fda commit ba9c3c1
Show file tree
Hide file tree
Showing 3 changed files with 15 additions and 0 deletions.
2 changes: 2 additions & 0 deletions proposals/simd/BinarySIMD.md
Original file line number Diff line number Diff line change
Expand Up @@ -199,6 +199,8 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`.
| `v128.andnot` | `0xd8`| - |
| `i8x16.avgr_u` | `0xd9`| |
| `i16x8.avgr_u` | `0xda`| |
| `i32x4.dot_i16x8_s` | `0xdb`| - |
| `i32x4.dot_i16x8_add_s` | `0xdc`| - |
| `i8x16.abs` | `0xe1`| - |
| `i16x8.abs` | `0xe2`| - |
| `i32x4.abs` | `0xe3`| - |
2 changes: 2 additions & 0 deletions proposals/simd/ImplementationStatus.md
Original file line number Diff line number Diff line change
Expand Up @@ -126,6 +126,8 @@
| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | |
| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | |
| `i32x4.abs` | | | | |
| `i32x4.dot_i16x8_s` | | | | |
| `i32x4.dot_i16x8_add_s` | | | | |
| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
Expand Down
11 changes: 11 additions & 0 deletions proposals/simd/SIMD.md
Original file line number Diff line number Diff line change
Expand Up @@ -380,6 +380,17 @@ def S.mul(a, b):
return S.lanewise_binary(mul, a, b)
```

### Integer dot product
* `i32x4.dot_i16x8_s(a: v128, b: v128) -> v128`

Lane-wise multiply signed 16-bit integers in the two input vectors and add adjacent pairs of the full 32-bit results.

### Integer dot product with accumulation

* `i32x4.dot_i16x8_add_s(a: v128, b: v128, c: v128) -> v128`

Lane-wise multiply signed 16-bit integers in the two input vectors, add adjacent pairs of the full 32-bit results, and accumulate with corresponding 32-bit lanes of `c`. This operation is equivalent to `i32x4.add(i32x4.dot_i16x8_s(a, b), c)`.

### Integer negation
* `i8x16.neg(a: v128) -> v128`
* `i16x8.neg(a: v128) -> v128`
Expand Down

0 comments on commit ba9c3c1

Please sign in to comment.