Implement EMCU primitive #279
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In this PR we add the ARM Cortex M3 microcontroller integrated in the GW1NSR-4C chip that powers the Sipeed TangNano 4K. This primitive represents the microprocessor itself, but you need to add ROM (flash), RAM, and some I/O to it for proper operation. Luckily we have working flash, BSRAM and IOBUFs :) The examples will show how to use this EMCU in the simplest cases. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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I'll add a couple more examples, but actually they won't go through compilation yet - wait for |
It shows the practical minimum of It shows the practical minimum of the components that need to be added to the EMCU primitive to get a working system. You can use more memory addressing lines thereby increasing its volume with the current 4K, as well as those who wish can make an APB bus to communicate with other devices. Firmware compilation is very difficult, but there is a good description: https://github.com/verilog-indeed/gowin_fpga_tutorials/tree/main/gowin_empu Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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It blinks with the LED that on the board, MODE but what can you do. blinky.mp4 |
Use first UART of the Cortex-M3 emcu for text adventure-like game. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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The processor built into the GW1NSR-4C can communicate with the outside world using another mechanism besides the Flash, memory and GPIO buses - this is the Advanced Peripheral Bus (APB). APB is part of the Advanced Microcontroller Bus Architecture hierarchy of buses and is optimized for minimal power consumption and reduced interface complexity. APB should be used to interface to any peripherals which are low-bandwidth and do not require the high performance of a piplined bus interface. Strictly speaking, according to the specification there must be a bridge between the high-speed AHB bus and the APB bus, among the functions of which are device selection (PSELx), generation of the PENABLE signal and holding of values on the address bus. And if PSELx signals have to be generated, there is no question, the EMCU primitive already has a PENABLE output. So I took the liberty and did not implement the latching of address lines, so the bridge turned out to be very small: ``` verilog wire psel1; assign psel1 = apbtargexp2_psel && (apbtargexp2_paddr[11:8] == 4'h4); // 0x40002 >4< 00 ``` Here I compare to the address of the first device - 0x40002400, there are 12 such devices with base addresses spaced 256 bytes apart (this does not cover the entire range of the 4 high bits of the APB address bus, so there are probably some unknown devices with fixed addresses). I don't use the [7:0] address bits in this example, but it's actually a very useful thing to implement the registers of a particular peripheral. The exchange is done in 32-bit words so 64 registers per device. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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We not only flash the LED, but also read its status - it is a read/write bus after all. :) apb-0.mp4
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Here we demonstrate the implementation of a more advanced peripheral to the Tangnano4k embedded processor - the SPI controller as a device on the APB. logo.mp4 |
Here we demonstrate the implementation of a more advanced peripheral to the Tangnano4k embedded processor - the SPI controller as a device on the APB. It is very simple but nevertheless it is represented in the address space of the processor as status, control and data registers. The status register is used to indicate that the controller is busy, the control register allows the bit order to be changed during transmission. SPI is used to control the display, the picture is decompressed from ROM and sent byte by by byte to the controller. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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In this PR we add the ARM Cortex M3 microcontroller integrated in the GW1NSR-4C chip that powers the Sipeed TangNano 4K.
This primitive represents the microprocessor itself, but you need to add ROM (flash), RAM, and some I/O to it for proper operation.
Luckily we have working flash, BSRAM and IOBUFs :)
The examples will show how to use this EMCU in the simplest cases.