dosage CPU

Dosage is a 20bit single cycle RISC CPU based on Harvard architecture with no cache or pipeline,
by having a very simple and reduced instruction set it can be used for educational purposes
Watch this video for an introduction: https://drive.google.com/file/d/1GPNIOUYStuIIaBxNrNf2s0lSr6e-6CIY/view?usp=sharing

ISA

Phase 1 cpu designed in logicism with a reduced instruction set

Assembler

phase 2
We also write an assembler in order to run assembly on dosage
You can find it Python file.

hardware_description

phase 3
This hardware is also described in Verilog
so we can build dosage in the physical world too!

next:

running C on this CPU