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soc: arm: ambiq: apollo4: Add support for Apollo4 Plus SoC
Add all required parts (new SoC family/series, device tree) for the Ambiq Apollo4 Plus SoC. Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
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/* SPDX-License-Identifier: Apache-2.0 */ | ||
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#include <arm/armv7-m.dtsi> | ||
#include <mem.h> | ||
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/ { | ||
cpus { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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cpu0: cpu@0 { | ||
compatible = "arm,cortex-m4f"; | ||
reg = <0>; | ||
}; | ||
}; | ||
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/* MRAM region */ | ||
flash0: flash@18000 { | ||
compatible = "soc-nv-flash"; | ||
reg = <0x00018000 0x1e8000>; | ||
}; | ||
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/* TCM + SRAM region */ | ||
sram0: memory@10000000 { | ||
compatible = "mmio-sram"; | ||
reg = <0x10000000 0x2C0000>; | ||
}; | ||
}; | ||
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&nvic { | ||
arm,num-irq-priority-bits = <3>; | ||
}; |
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# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
# Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
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add_subdirectory(${SOC_SERIES}) | ||
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zephyr_include_directories(.) |
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# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
# Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
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config SOC_FAMILY_AMBIQ | ||
bool | ||
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if SOC_FAMILY_AMBIQ | ||
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config SOC_FAMILY | ||
string | ||
default "ambiq" | ||
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source "soc/arm/ambiq/*/Kconfig.soc" | ||
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endif # SOC_FAMILY_AMBIQ |
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# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
# Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
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source "soc/arm/ambiq/*/Kconfig.defconfig.series" |
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# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
# Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
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source "soc/arm/ambiq/*/Kconfig.series" |
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# Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
# | ||
# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
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zephyr_sources(soc.c) | ||
zephyr_include_directories(${ZEPHYR_BASE}/soc/arm/common/cortex_m) |
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# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
# Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
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if SOC_APOLLO4P | ||
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config NUM_IRQS | ||
default 83 | ||
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DT_NODE_SRAM := /memory@0 | ||
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config SRAM_NC_SIZE | ||
default $(dt_node_reg_size_int,$(DT_NODE_SRAM),1,K) | ||
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config SRAM_NC_BASE_ADDRESS | ||
default $(dt_node_reg_addr_hex,$(DT_NODE_SRAM),1) | ||
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endif # SOC_APOLLO4P |
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# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
# Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
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if SOC_SERIES_APOLLO4X | ||
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source "soc/arm/ambiq/apollo4x/Kconfig.defconfig.apollo4*" | ||
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config SOC_SERIES | ||
default "apollo4x" | ||
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endif # SOC_SERIES_APOLLO4X |
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# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
# Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
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# Ambiq Apollo4 MCU Series | ||
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config SOC_SERIES_APOLLO4X | ||
bool "Apollo4 Series MCU" | ||
select ARM | ||
select CPU_CORTEX_M4 | ||
select CPU_CORTEX_M_HAS_DWT | ||
select CPU_HAS_FPU | ||
select SOC_FAMILY_AMBIQ | ||
select HAS_SWO | ||
select AMBIQ_HAL | ||
help | ||
Enable support for Apollo4 MCU series |
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# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
# Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
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choice | ||
prompt "Ambiq Apollo4X Selection" | ||
depends on SOC_SERIES_APOLLO4X | ||
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config SOC_APOLLO4P | ||
bool "Apollo4P" | ||
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endchoice |
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/* | ||
* Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld> |
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/* | ||
* Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <zephyr/init.h> | ||
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#include <am_mcu_apollo.h> | ||
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static int arm_apollo4_init(void) | ||
{ | ||
am_hal_pwrctrl_low_power_init(); | ||
am_hal_rtc_osc_disable(); | ||
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return 0; | ||
} | ||
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SYS_INIT(arm_apollo4_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); |
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/* | ||
* Copyright (c) 2023 Antmicro <www.antmicro.com> | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#ifndef __SOC_H__ | ||
#define __SOC_H__ | ||
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#include <apollo4p.h> | ||
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#endif /* __SOC_H__ */ |