Skip to content

Commit

Permalink
Opcode adjustments (WebAssembly#51)
Browse files Browse the repository at this point in the history 
* Move unary instructions before binary instructions. Fix order of
floating point unary ops.

* Move reserved spaces for reciprocal sqrt and approx reciprocal to the end of the unary op blocks.

* Move shifts in between unary and binary ops since they are kind of hybrid.
  • Loading branch information
@tlively
tlively authored Nov 8, 2018
1 parent 326fa3b commit 36bbc08
Showing 1 changed file with 61 additions and 61 deletions.
122 changes: 61 additions & 61 deletions proposals/simd/BinarySIMD.md
View file
Original file line number Diff line number Diff line change
Expand Up @@ -98,67 +98,67 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`.
| `v128.xor` | `0x4e`| - |
| `v128.not` | `0x4f`| - |
| `v128.bitselect` | `0x50`| - |
| `i8x16.add` | `0x51`| - |
| `i8x16.add_saturate_s` | `0x52`| - |
| `i8x16.add_saturate_u` | `0x53`| - |
| `i8x16.sub` | `0x54`| - |
| `i8x16.sub_saturate_s` | `0x55`| - |
| `i8x16.sub_saturate_u` | `0x56`| - |
| `i8x16.mul` | `0x57`| - |
| `i8x16.shl` | `0x5c`| - |
| `i8x16.shr_s` | `0x5d`| - |
| `i8x16.shr_u` | `0x5e`| - |
| `i8x16.neg` | `0x5f`| - |
| `i8x16.any_true` | `0x60`| - |
| `i8x16.all_true` | `0x61`| - |
| `i16x8.add` | `0x62`| - |
| `i16x8.add_saturate_s` | `0x63`| - |
| `i16x8.add_saturate_u` | `0x64`| - |
| `i16x8.sub` | `0x65`| - |
| `i16x8.sub_saturate_s` | `0x66`| - |
| `i16x8.sub_saturate_u` | `0x67`| - |
| `i16x8.mul` | `0x68`| - |
| `i16x8.shl` | `0x6d`| - |
| `i16x8.shr_s` | `0x6e`| - |
| `i16x8.shr_u` | `0x6f`| - |
| `i16x8.neg` | `0x70`| - |
| `i16x8.any_true` | `0x71`| - |
| `i16x8.all_true` | `0x72`| - |
| `i32x4.add` | `0x73`| - |
| `i32x4.sub` | `0x76`| - |
| `i32x4.mul` | `0x79`| - |
| `i32x4.shl` | `0x7e`| - |
| `i32x4.shr_s` | `0x7f`| - |
| `i32x4.shr_u` | `0x80`| - |
| `i32x4.neg` | `0x81`| - |
| `i32x4.any_true` | `0x82`| - |
| `i32x4.all_true` | `0x83`| - |
| `i64x2.add` | `0x84`| - |
| `i64x2.sub` | `0x87`| - |
| `i64x2.shl` | `0x8f`| - |
| `i64x2.shr_s` | `0x90`| - |
| `i64x2.shr_u` | `0x91`| - |
| `i64x2.neg` | `0x92`| - |
| `i64x2.any_true` | `0x93`| - |
| `i64x2.all_true` | `0x94`| - |
| `f32x4.add` | `0x95`| - |
| `f32x4.sub` | `0x96`| - |
| `f32x4.mul` | `0x97`| - |
| `f32x4.div` | `0x98`| - |
| `f32x4.min` | `0x99`| - |
| `f32x4.max` | `0x9a`| - |
| `f32x4.neg` | `0x9b`| - |
| `f32x4.abs` | `0x9c`| - |
| `f32x4.sqrt` | `0x9d`| - |
| `f64x2.add` | `0xa0`| - |
| `f64x2.sub` | `0xa1`| - |
| `f64x2.mul` | `0xa2`| - |
| `f64x2.div` | `0xa3`| - |
| `f64x2.min` | `0xa4`| - |
| `f64x2.max` | `0xa5`| - |
| `f64x2.neg` | `0xa6`| - |
| `f64x2.abs` | `0xa7`| - |
| `f64x2.sqrt` | `0xa8`| - |
| `i8x16.neg` | `0x51`| - |
| `i8x16.any_true` | `0x52`| - |
| `i8x16.all_true` | `0x53`| - |
| `i8x16.shl` | `0x54`| - |
| `i8x16.shr_s` | `0x55`| - |
| `i8x16.shr_u` | `0x56`| - |
| `i8x16.add` | `0x57`| - |
| `i8x16.add_saturate_s` | `0x58`| - |
| `i8x16.add_saturate_u` | `0x59`| - |
| `i8x16.sub` | `0x5a`| - |
| `i8x16.sub_saturate_s` | `0x5b`| - |
| `i8x16.sub_saturate_u` | `0x5c`| - |
| `i8x16.mul` | `0x5d`| - |
| `i16x8.neg` | `0x62`| - |
| `i16x8.any_true` | `0x63`| - |
| `i16x8.all_true` | `0x64`| - |
| `i16x8.shl` | `0x65`| - |
| `i16x8.shr_s` | `0x66`| - |
| `i16x8.shr_u` | `0x67`| - |
| `i16x8.add` | `0x68`| - |
| `i16x8.add_saturate_s` | `0x69`| - |
| `i16x8.add_saturate_u` | `0x6a`| - |
| `i16x8.sub` | `0x6b`| - |
| `i16x8.sub_saturate_s` | `0x6c`| - |
| `i16x8.sub_saturate_u` | `0x6d`| - |
| `i16x8.mul` | `0x6e`| - |
| `i32x4.neg` | `0x73`| - |
| `i32x4.any_true` | `0x74`| - |
| `i32x4.all_true` | `0x75`| - |
| `i32x4.shl` | `0x76`| - |
| `i32x4.shr_s` | `0x77`| - |
| `i32x4.shr_u` | `0x78`| - |
| `i32x4.add` | `0x79`| - |
| `i32x4.sub` | `0x7c`| - |
| `i32x4.mul` | `0x7f`| - |
| `i64x2.neg` | `0x84`| - |
| `i64x2.any_true` | `0x85`| - |
| `i64x2.all_true` | `0x86`| - |
| `i64x2.shl` | `0x97`| - |
| `i64x2.shr_s` | `0x98`| - |
| `i64x2.shr_u` | `0x99`| - |
| `i64x2.add` | `0x8a`| - |
| `i64x2.sub` | `0x8d`| - |
| `f32x4.abs` | `0x95`| - |
| `f32x4.neg` | `0x96`| - |
| `f32x4.sqrt` | `0x97`| - |
| `f32x4.add` | `0x9a`| - |
| `f32x4.sub` | `0x9b`| - |
| `f32x4.mul` | `0x9c`| - |
| `f32x4.div` | `0x9d`| - |
| `f32x4.min` | `0x9e`| - |
| `f32x4.max` | `0x9f`| - |
| `f64x2.abs` | `0xa0`| - |
| `f64x2.neg` | `0xa1`| - |
| `f64x2.sqrt` | `0xa2`| - |
| `f64x2.add` | `0xa5`| - |
| `f64x2.sub` | `0xa6`| - |
| `f64x2.mul` | `0xa7`| - |
| `f64x2.div` | `0xa8`| - |
| `f64x2.min` | `0xa9`| - |
| `f64x2.max` | `0xaa`| - |
| `i32x4.trunc_s/f32x4:sat` | `0xab`| - |
| `i32x4.trunc_u/f32x4:sat` | `0xac`| - |
| `i64x2.trunc_s/f64x2:sat` | `0xad`| - |
Expand Down

0 comments on commit 36bbc08

Please sign in to comment.