Merge AU50 into Alveo example design

Signed-off-by: Alex Forencich <alex@alexforencich.com>
alexforencich · Nov 10, 2023 · fe5f6aa · fe5f6aa
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diff --git a/example/AU50/fpga_25g/Makefile b/example/AU50/fpga_25g/Makefile
diff --git a/example/AU50/fpga_25g/README.md b/example/AU50/fpga_25g/README.md
diff --git a/example/AU50/fpga_25g/common/vivado.mk b/example/AU50/fpga_25g/common/vivado.mk
diff --git a/example/AU50/fpga_25g/ip/eth_xcvr_gt.tcl b/example/AU50/fpga_25g/ip/eth_xcvr_gt.tcl
diff --git a/example/AU50/fpga_25g/lib/eth b/example/AU50/fpga_25g/lib/eth