axi_logic_analyzer: Fix push-pull/open-drain selection

analogdevicesinc · Feb 12, 2018 · 944edeb · 944edeb
1 parent bf3ba44
commit 944edeb
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/library/axi_logic_analyzer/axi_logic_analyzer.v b/library/axi_logic_analyzer/axi_logic_analyzer.v
@@ -192,7 +192,7 @@ module axi_logic_analyzer (
 
   generate
   for (i = 0 ; i < 16; i = i + 1) begin
-    assign data_t[i] = od_pp_n[i] ? io_selection[i] & !data_o[i] : io_selection[i];
+    assign data_t[i] = od_pp_n[i] ? io_selection[i] | data_o[i] : io_selection[i];
     always @(posedge clk_out) begin
       data_o[i] <= overwrite_enable[i] ? overwrite_data[i] : data_r[i];
     end