Squashed commit of the following:

commit 76483ff815e1e442cda9677f54d5c8be8428723f
Author: androda <androda@users.noreply.github.com>
Date:   Fri Apr 15 06:45:37 2022 -0600

    Add HW

commit 6bc545ae7fe749063ec50225f4415f7c3cb96f44
Author: androda <androda@users.noreply.github.com>
Date:   Fri Apr 15 05:18:12 2022 -0600

    Move the #define

commit 13a177ae4f82974133de368daeed5b8c4d692e4f
Author: androda <androda@users.noreply.github.com>
Date:   Fri Apr 8 14:04:16 2022 -0600

    Testing New Feature

commit d0a065c
Author: androda <androda@users.noreply.github.com>
Date:   Thu Apr 7 11:27:46 2022 -0600

    Update snapshot version

commit accf789
Author: Eric Helgeson <erichelgeson@gmail.com>
Date:   Sun Apr 3 14:51:22 2022 -0500

    init blk1
    Thanks to @moof via discord

commit 4f9ce2c
Author: Glenn Anderson <github@mactcp.net>
Date:   Thu Mar 31 13:33:24 2022 -0700

    Remove obsolete initialization of sector data overrun byte.

commit 0b9343a
Author: Glenn Anderson <github@mactcp.net>
Date:   Thu Mar 31 09:23:30 2022 -0700

    Correct == to = for verify with bytchk of 3

commit 916e0e6
Author: Glenn Anderson <github@mactcp.net>
Date:   Mon Mar 28 15:01:40 2022 -0700

    Reorder bus phase change and file.seek() so that file.seek() acts as a bus settle delay.

commit 0a12c2c
Author: androda <androda@users.noreply.github.com>
Date:   Thu Apr 7 10:22:45 2022 -0600

    Use PC pins for image select since F4 uses PB1 already

commit 129d0b4
Author: Eric Helgeson <erichelgeson@gmail.com>
Date:   Sat Mar 19 07:25:25 2022 -0500

    Image set selection

commit 9a51e8f
Author: Eric Helgeson <erichelgeson@gmail.com>
Date:   Fri Mar 25 08:23:39 2022 -0500

    Merge pull request erichelgeson#71 from mactcp/AppleHDSCSetup

    Apple HD SC Setup support

commit 22d3128
Author: androda <androda@users.noreply.github.com>
Date:   Thu Apr 7 09:50:16 2022 -0600

    F4-specific tweaks to SD setup

commit c965b24
Author: Eric Helgeson <erichelgeson@gmail.com>
Date:   Sun Feb 27 14:22:13 2022 -0600

    Try clock speeds from 50 -> 32mhz for SD communication
    Helps compatibility with SD and different STM32 chips.
    Add warning if under 40mhz - testing showed 40-50mhz gave almost no change in speed

    Thanks @marcelv-3 via erichelgeson#58

commit d1c36e5
Author: androda <androda@users.noreply.github.com>
Date:   Thu Apr 7 09:40:32 2022 -0600

    Missed this, another F4 specific difference

commit c025c06
Author: androda <androda@users.noreply.github.com>
Date:   Thu Apr 7 08:58:00 2022 -0600

    F4-specific changes

    No BRR, and readout is different

commit f3da4d5
Author: Glenn Anderson <github@mactcp.net>
Date:   Sat Mar 19 13:02:34 2022 -0700

    Change readDataLoop alignment to 16

commit 80d691b
Author: Glenn Anderson <github@mactcp.net>
Date:   Sat Mar 19 12:04:57 2022 -0700

    Switch to latest toolchain.
    Tune the timing for the readDataLoop with the latest toolchain.

commit e1a6253
Author: Glenn Anderson <github@mactcp.net>
Date:   Fri Mar 18 15:51:22 2022 -0700

    Pin down alignment for writeDataLoop and readDataLoop, and perform some additional timing adjustment.

commit 10e3262
Author: Glenn Anderson <github@mactcp.net>
Date:   Thu Mar 17 18:08:00 2022 -0700

    Read timing adjustment, now getting 1216 KB/sec on LC III+.
    First pass at write speed optimization, now getting 825 KB/sec on LC III+.
    Whitespace cleanup.

commit aa27be8
Author: Glenn Anderson <github@mactcp.net>
Date:   Thu Mar 17 16:36:39 2022 -0700

    Separate out writeDataLoop. Adjust the timing, and incorporate the loop overhead in to one of the desired delays.

commit 81f74d1
Author: Glenn Anderson <github@mactcp.net>
Date:   Wed Mar 16 13:21:10 2022 -0700

    Move the db_bsrr table to RAM for faster performance.

commit 9aa5fa4
Author: Glenn Anderson <github@mactcp.net>
Date:   Tue Mar 15 09:57:21 2022 -0700

    Add explicit "bx lr" to longjmpFromInterrupt.

commit 251b2a8
Author: androda <androda@users.noreply.github.com>
Date:   Thu Apr 7 07:45:59 2022 -0600

    F4-specific fix for EXTI issues

commit ffcc923
Author: Glenn Anderson <github@mactcp.net>
Date:   Mon Mar 14 12:43:57 2022 -0700

    Optimize handling of reset interrupt.

commit d31512c
Author: Glenn Anderson <github@mactcp.net>
Date:   Sat Mar 5 15:45:47 2022 -0800

    CLZ optimization

hw/Desktop_50Pin/XCVR_F4Lite_SMD_V1/PartsList/XCVR_F4Lite_SMD_V1.csv

@@ -0,0 +1,18 @@
+Id,Designator,Quantity,Part
+1,J3,1,"SCSI 50 Pin Connector, 2x25 2.54mm spacing male header"
+2,"R6,R4,R5,R10,R7,R8,R1,R11,R9,R3,R2,R18,R17,R16,R15,R14,R13,R12",18,"0603 SMD Resistor, 110 Ohm"
+3,J4,1,"Berg Floppy Connector, TE Connectivity 171826-4"
+4,"C1,C2",2,"1206 SMD 22uF Capacitor, 10v+"
+5,U3,1,AMS1117-2.85
+6,"U1, U2",2,SN74CBTD3861DBQR
+7,F1,1,0ZRR0050FF1E 
+8,"C3,C9,C10,C11,C12",5,"0805 SMD 4.7uF Capacitor, 10v+"
+10,"U4,U5",2,SN74LVT162245ADGGR 
+11,"C4,C5,C6,C7,C8",5,"0805 SMD 0.1uF Capacitor, 10v+"
+12,R19,1,0805 SMD 10k resistor
+13,J1,1,1x2 male header
+14,R21,1,"0805 SMD Resistor, 470 Ohm"
+15,SD1,1,SOFNG SD-001
+16,"D1,D2",2,SS14 SMA Diode
+17,J2,1,1x3 male header
+18,U6,1,Green STM32F401 Dev Board

hw/Desktop_50Pin/XCVR_F4Lite_SMD_V1/XCVR_F4Lite_SMD_V1.kicad_prl

@@ -0,0 +1,77 @@
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