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FIX: Rollback port creation behavior with no ref pin on cmp #694

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1df26cb
hfsspi SimsetupInfo bug fixed
svandenb-dev Jun 21, 2024
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svandenb-dev Jul 24, 2024
a791a61
reverting extending ref pins search
svandenb-dev Jul 24, 2024
d89c7fb
reverting extending ref pins search
svandenb-dev Jul 24, 2024
86a8e3f
reverting extending ref pins search
svandenb-dev Jul 24, 2024
2f99873
reverting extending ref pins search
svandenb-dev Jul 24, 2024
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Revert "reverting extending ref pins search"
svandenb-dev Jul 24, 2024
406592a
Revert "reverting extending ref pins search"
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Merge branch 'main' into rollback-port-creation-behavior-with-no-ref-…
svandenb-dev Jul 24, 2024
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40 changes: 28 additions & 12 deletions src/pyedb/dotnet/edb_core/components.py
Original file line number Diff line number Diff line change
Expand Up @@ -926,6 +926,7 @@ def create_port_on_component(
solder_balls_height=None,
solder_balls_size=None,
solder_balls_mid_size=None,
extend_reference_pins_outside_component=False,
):
"""Create ports on a component.

Expand Down Expand Up @@ -958,6 +959,9 @@ def create_port_on_component(
solder_balls_mid_size : float, optional
Solder balls mid-diameter. When provided if value is different than solder balls size, spheroid shape will
be switched.
extend_reference_pins_outside_component : bool
When no reference pins are found on the component extend the pins search with taking the closest one. If
`do_pingroup` is `True` will be set to `False`. Default value is `False`.

Returns
-------
Expand Down Expand Up @@ -1016,7 +1020,7 @@ def create_port_on_component(
self._logger.error(
"No reference pins found on component. You might consider"
"using Circuit port instead since reference pins can be extended"
"outside the component automatically when not found."
"outside the component when not found if argument extend_reference_pins_outside_component is True."
)
return False
pad_params = self._padstack.get_pad_parameters(pin=cmp_pins[0], layername=pin_layers[0], pad_type=0)
Expand Down Expand Up @@ -1067,8 +1071,14 @@ def create_port_on_component(
if not p.IsLayoutPin():
p.SetIsLayoutPin(True)
if not ref_pins:
self._logger.warning("No reference pins found on component, the closest pin will be selected.")
do_pingroup = False
self._logger.warning("No reference pins found on component")
if not extend_reference_pins_outside_component:
self._logger.warning(
"argument extend_reference_pins_outside_component is False. You might want "
"setting to True to extend the reference pin search outside the component"
)
else:
do_pingroup = False
if do_pingroup:
if len(ref_pins) == 1:
ref_pins.is_pin = True
Expand Down Expand Up @@ -1111,16 +1121,22 @@ def create_port_on_component(
if ref_pins:
self.create_port_on_pins(component, pin, ref_pins)
else:
_pin = EDBPadstackInstance(pin, self._pedb)
ref_pin = _pin.get_reference_pins(
reference_net=reference_net[0], max_limit=1, component_only=False, search_radius=3e-3
)
if ref_pin:
self.create_port_on_pins(
component,
[EDBPadstackInstance(pin, self._pedb).name],
[EDBPadstackInstance(ref_pin[0], self._pedb).id],
if extend_reference_pins_outside_component:
_pin = EDBPadstackInstance(pin, self._pedb)
ref_pin = _pin.get_reference_pins(
reference_net=reference_net[0],
max_limit=1,
component_only=False,
search_radius=3e-3,
)
if ref_pin:
self.create_port_on_pins(
component,
[EDBPadstackInstance(pin, self._pedb).name],
[EDBPadstackInstance(ref_pin[0], self._pedb).id],
)
else:
self._logger.error("Skipping port creation no reference pin found.")
return True

def _create_terminal(self, pin, term_name=None):
Expand Down
48 changes: 25 additions & 23 deletions tests/legacy/system/test_edb.py
Original file line number Diff line number Diff line change
Expand Up @@ -1657,30 +1657,32 @@ def test_workflow(self, edb_examples):
edbapp.close()

def test_create_port_ob_component_no_ref_pins_in_component(self, edb_examples):
from pyedb.generic.constants import SourceType

edbapp = edb_examples.get_no_ref_pins_component()
sim_setup = edbapp.new_simulation_configuration()
sim_setup.signal_nets = [
"net1",
"net2",
"net3",
"net4",
"net5",
"net6",
"net7",
"net8",
"net9",
"net10",
"net11",
"net12",
"net13",
"net14",
"net15",
]
sim_setup.power_nets = ["GND"]
sim_setup.solver_type = 7
sim_setup.components = ["J2E2"]
sim_setup.do_cutout_subdesign = False
edbapp.build_simulation_project(sim_setup)
edbapp.components.create_port_on_component(
component="J2E2",
net_list=[
"net1",
"net2",
"net3",
"net4",
"net5",
"net6",
"net7",
"net8",
"net9",
"net10",
"net11",
"net12",
"net13",
"net14",
"net15",
],
port_type=SourceType.CircPort,
reference_net=["GND"],
extend_reference_pins_outside_component=True,
)
assert len(edbapp.ports) == 15

def test_create_ping_group(self, edb_examples):
Expand Down
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