FIX: Edb config set component rlc

src/pyedb/configuration/cfg_components.py

@@ -59,14 +59,11 @@ def __init__(self, **kwargs):
         self.reference_designator = kwargs.get("reference_designator", None)
         self.definition = kwargs.get("definition", None)
         self.type = kwargs.get("part_type", None)
-        self.value = kwargs.get("value", None)
         self.port_properties = CfgPortProperties(**kwargs["port_properties"]) if "port_properties" in kwargs else None
         self.solder_ball_properties = (
             CfgSolderBallsProperties(**kwargs["solder_ball_properties"]) if "solder_ball_properties" in kwargs else None
         )
-        rlc_models = kwargs.get("rlc_model", [])
-
-        self.rlc_model = [CfgRlcModel(**rlc_m) for rlc_m in rlc_models]
+        self.pin_pair_model = kwargs.get("pin_pair_model", None)
 
         self.x_location, self.y_location = kwargs.get("location", [None, None])
         self.angle = kwargs.get("angle", None)
@@ -84,7 +81,7 @@ def export_properties(self):
         data_comp["reference_designator"] = self.reference_designator
         data_comp["definition"] = self.definition
         data_comp["type"] = self.type
-        data_comp["value"] = self.value
+        data_comp["pin_pair_model"] = self.pin_pair_model
         data_comp["x_location"] = self.x_location
         data_comp["y_location"] = self.y_location
         # data_comp["angle"] = self.angle
@@ -119,33 +116,8 @@ def apply(self):
                     )
                 elif attr == "port_properties":
                     pass
-                elif attr == "rlc_model":
-                    rlc_models = value
-                    model_layout = c_db.model
-                    for pp in model_layout.pin_pairs:
-                        model_layout.delete_pin_pair_rlc(pp)
-                    for pp in rlc_models:
-                        pin_pair = self._pedb.edb_api.utility.PinPair(pp.p1, pp.p2)
-                        rlc = self._pedb.edb_api.utility.Rlc()
-                        rlc.IsParallel = False if pp.type else True
-                        if pp.resistance is not None:
-                            rlc.REnabled = True
-                            rlc.R = self._pedb.edb_value(pp.resistance)
-                        else:
-                            rlc.REnabled = False
-                        if pp.inductance is not None:
-                            rlc.LEnabled = True
-                            rlc.L = self._pedb.edb_value(pp.inductance)
-                        else:
-                            rlc.LEnabled = False
-
-                        if pp.capacitance is not None:
-                            rlc.CEnabled = True
-                            rlc.C = self._pedb.edb_value(pp.capacitance)
-                        else:
-                            rlc.CEnabled = False
-                        model_layout._set_pin_pair_rlc(pin_pair, rlc)
-                        comps_in_db.model = model_layout
+                elif attr == "pin_pair_model":
+                    c_db.set_model_properties(pin_pair_model=comp.pin_pair_model)
                 else:
                     if attr in dir(c_db):
                         setattr(c_db, attr, value)
@@ -160,7 +132,7 @@ def _load_data_from_db(self):
                 enabled=comp.enabled,
                 reference_designator=comp.name,
                 part_type=comp.type,
-                value=comp.value,
+                pin_pair_model=comp.get_model_properties().get("pin_pair_model"),
                 definition=comp.component_def,
                 location=comp.location,
                 placement_layer=comp.placement_layer,

src/pyedb/configuration/cfg_s_parameter_models.py

@@ -35,12 +35,15 @@ def __init__(self, pdata, path_lib, sparam_dict):
         self.components = self._sparam_dict.get("components", [])
         self.reference_net = self._sparam_dict.get("reference_net", "")
         self.reference_net_per_component = self._sparam_dict.get("reference_net_per_component", {})
+        self.pin_order = self._sparam_dict.get("pin_order", None)
 
     def apply(self):
         fpath = self.file_path
         if not Path(fpath).anchor:
             fpath = str(Path(self.path_libraries) / fpath)
         comp_def = self._pedb.definitions.component[self.component_definition]
+        if self.pin_order:
+            comp_def.set_properties(pin_order=self.pin_order)
         comp_def.add_n_port_model(fpath, self.name)
         comp_list = dict()
         if self.apply_to_all:

src/pyedb/dotnet/edb_core/cell/hierarchy/component.py

@@ -1008,3 +1008,88 @@ def create_clearance_on_component(self, extra_soldermask_clearance=1e-4):
         )
         void.is_negative = True
         return True
+
+    def get_model_properties(self):
+        pp = {}
+        c_p = self.component_property
+        model = c_p.GetModel().Clone()
+        netlist_model = {}
+        pin_pair_model = []
+        s_parameter_model = []
+        spice_model = {}
+        if model.GetModelType().ToString() == "NetlistModel":
+            netlist_model["netlist"] = model.GetNetlist()
+        elif model.GetModelType().ToString() == "PinPairModel":
+            temp = {}
+            for i in model.PinPairs:
+                temp["first_pin"] = i.FirstPin
+                temp["second_pin"] = i.SecondPin
+                rlc = model.GetPinPairRlc(i)
+                temp["is_parallel"] = rlc.IsParallel
+                temp["resistance"] = rlc.R.ToString()
+                temp["resistance_enabled"] = rlc.REnabled
+                temp["inductance"] = rlc.L.ToString()
+                temp["inductance_enabled"] = rlc.LEnabled
+                temp["capacitance"] = rlc.C.ToString()
+                temp["capacitance_enabled"] = rlc.CEnabled
+                pin_pair_model.append(temp)
+        elif model.GetModelType().ToString() == "SParameterModel":
+            s_parameter_model["reference_net"] = model.GetReferenceNet()
+            s_parameter_model["model_name"] = model.GetComponentModelName()
+        elif model.GetModelType().ToString() == "SPICEModel":
+            spice_model["model_name"] = model.GetModelName()
+            spice_model["model_path"] = model.GetModelPath()
+            spice_model["sub_circuit"] = model.GetSubCkt()
+            spice_model["terminal_pairs"] = [[i, j] for i, j in dict(model.GetTerminalPinPairs()).items()]
+
+        if netlist_model:
+            pp["netlist_model"] = netlist_model
+        if pin_pair_model:
+            pp["pin_pair_model"] = pin_pair_model
+        if s_parameter_model:
+            pp["s_parameter_model"] = s_parameter_model
+        if spice_model:
+            pp["spice_model"] = spice_model
+        return pp
+
+    def set_model_properties(self, **kwargs):
+        netlist_model = kwargs.get("netlist_model")
+        pin_pair_model = kwargs.get("pin_pair_model")
+        s_parameter_model = kwargs.get("s_parameter_model")
+        spice_model = kwargs.get("spice_model")
+
+        c_p = self.component_property
+        if netlist_model:
+            m = self._pedb._edb.Cell.Hierarchy.SParameterModel()
+            m.SetNetlist(netlist_model["netlist"])
+            c_p.SetModel(m)
+            self.component_property = c_p
+        elif pin_pair_model:
+            m = self._pedb._edb.Cell.Hierarchy.PinPairModel()
+            for i in pin_pair_model:
+                p = self._pedb._edb.Utility.PinPair(str(i["first_pin"]), str(i["second_pin"]))
+                rlc = self._pedb._edb.Utility.Rlc(
+                    self._pedb.edb_value(i["resistance"]),
+                    i["resistance_enabled"],
+                    self._pedb.edb_value(i["inductance"]),
+                    i["inductance_enabled"],
+                    self._pedb.edb_value(i["capacitance"]),
+                    i["capacitance_enabled"],
+                    i["is_parallel"],
+                )
+                m.SetPinPairRlc(p, rlc)
+            c_p.SetModel(m)
+            self.component_property = c_p
+        elif s_parameter_model:
+            m = self._pedb._edb.Cell.Hierarchy.SParameterModel()
+            m.SetComponentModelName(s_parameter_model["model_name"])
+            m.SetReferenceNet(s_parameter_model["reference_net"])
+            c_p.SetModel(m)
+            self.component_property = c_p
+        elif spice_model:
+            self.assign_spice_model(
+                spice_model["model_path"],
+                spice_model["model_name"],
+                spice_model["sub_circuit"],
+                spice_model["terminal_pairs"],
+            )

src/pyedb/dotnet/edb_core/definition/component_def.py

@@ -23,6 +23,7 @@
 import os
 
 from pyedb.dotnet.edb_core.definition.component_model import NPortComponentModel
+from pyedb.dotnet.edb_core.general import convert_py_list_to_net_list
 from pyedb.dotnet.edb_core.utilities.obj_base import ObjBase
 
 
@@ -197,3 +198,18 @@ def create(self, name):
         footprint_cell = self._pedb._active_cell.cell.Create(self._pedb.active_db, cell_type, name)
         edb_object = self._pedb.edb_api.definition.ComponentDef.Create(self._pedb.active_db, name, footprint_cell)
         return EDBComponentDef(self._pedb, edb_object)
+
+    def get_properties(self):
+        data = {}
+        temp = []
+        for i in list(self._edb_object.ComponentDefPins):
+            temp.append(i.GetName())
+        data["pin_order"] = temp
+        return data
+
+    def set_properties(self, **kwargs):
+        pin_order = kwargs.get("pin_order")
+        if pin_order:
+            old = {i.GetName(): i for i in list(self._edb_object.ComponentDefPins)}
+            temp = convert_py_list_to_net_list([old[str(i)] for i in pin_order])
+            self._edb_object.ReorderPins(temp)

tests/legacy/system/test_edb_components.py

@@ -605,3 +605,23 @@ def test_component_lib(self):
         assert network.frequency.npoints == 400
         network.write_touchstone(os.path.join(edbapp.directory, "test_export.s2p"))
         assert os.path.isfile(os.path.join(edbapp.directory, "test_export.s2p"))
+
+    def test_properties(self, edb_examples):
+        edbapp = edb_examples.get_si_verse()
+        pp = {
+            "pin_pair_model": [
+                {
+                    "first_pin": "2",
+                    "second_pin": "1",
+                    "is_parallel": True,
+                    "resistance": "10ohm",
+                    "resistance_enabled": True,
+                    "inductance": "1nH",
+                    "inductance_enabled": True,
+                    "capacitance": "1nF",
+                    "capacitance_enabled": True,
+                }
+            ]
+        }
+        edbapp.components["C378"].set_model_properties(**pp)
+        assert edbapp.components["C378"].get_model_properties() == pp

tests/legacy/system/test_edb_configuration_2p0.py

@@ -389,15 +389,16 @@ def test_06_s_parameters(self, edb_examples):
             "general": {"s_parameter_library": self.local_input_folder},
             "s_parameters": [
                 {
-                    "name": "GRM32_DC0V_25degC_series",
+                    "name": "cap_model1",
                     "file_path": "GRM32_DC0V_25degC_series.s2p",
                     "component_definition": "CAPC3216X180X55ML20T25",
                     "apply_to_all": True,
                     "components": [],
                     "reference_net": "GND",
+                    "pin_order": ["1", "2"],
                 },
                 {
-                    "name": "GRM32_DC0V_25degC_series",
+                    "name": "cap2_model2",
                     "file_path": "GRM32_DC0V_25degC_series.s2p",
                     "apply_to_all": False,
                     "component_definition": "CAPC3216X190X55ML30T25",
@@ -901,30 +902,26 @@ def test_16_components_rlc(self, edb_examples):
             {
                 "reference_designator": "C375",
                 "enabled": False,
-                "value": 100e-9,
-            },
-            {
-                "reference_designator": "L2",
-                "part_type": "resistor",
-                "rlc_model": [
+                "pin_pair_model": [
                     {
-                        "type": "series",
-                        "capacitance": "100nf",
-                        "inductance": "1nh",
-                        "resistance": "0.001",
-                        "p1": "1",
-                        "p2": "2",
+                        "first_pin": "2",
+                        "second_pin": "1",
+                        "is_parallel": False,
+                        "resistance": "10ohm",
+                        "resistance_enabled": True,
+                        "inductance": "1nH",
+                        "inductance_enabled": False,
+                        "capacitance": "10nF",
+                        "capacitance_enabled": True,
                     }
                 ],
             },
         ]
         data = {"components": components}
         edbapp = edb_examples.get_si_verse()
-        assert edbapp.configuration.get_data_from_db(components=True)
         assert edbapp.configuration.load(data, apply_file=True)
-        assert edbapp.components["C375"].enabled == False
-        assert edbapp.components["C375"].value == 100e-9
-        assert edbapp.components["L2"].type == "Resistor"
+        assert edbapp.components["C375"].get_model_properties()["pin_pair_model"] == components[0]["pin_pair_model"]
+        edbapp.configuration.get_data_from_db(components=True)
 
         edbapp.close()
 

tests/legacy/system/test_edb_definition.py

@@ -45,13 +45,15 @@ def test_definitions(self):
         assert isinstance(self.edbapp.definitions.component, dict)
         assert isinstance(self.edbapp.definitions.package, dict)
 
-    def test_component_s_parameter(self):
+    def test_component_s_parameter(self, edb_examples):
+        edbapp = edb_examples.get_si_verse()
         sparam_path = os.path.join(local_path, "example_models", test_subfolder, "GRM32_DC0V_25degC_series.s2p")
 
-        self.edbapp.definitions.component["CAPC3216X180X55ML20T25"].add_n_port_model(
-            sparam_path, "GRM32_DC0V_25degC_series"
-        )
-        self.edbapp.components["C200"].use_s_parameter_model("GRM32_DC0V_25degC_series")
+        edbapp.definitions.component["CAPC3216X180X55ML20T25"].add_n_port_model(sparam_path, "GRM32_DC0V_25degC_series")
+        edbapp.components["C200"].use_s_parameter_model("GRM32_DC0V_25degC_series")
+        pp = {"pin_order": ["1", "2"]}
+        edbapp.definitions.component["CAPC3216X180X55ML20T25"].set_properties(**pp)
+        assert edbapp.definitions.component["CAPC3216X180X55ML20T25"].get_properties()["pin_order"] == ["1", "2"]
 
     def test_add_package_def(self, edb_examples):
         edbapp = edb_examples.get_si_verse()