feat(sgx_types): update macros to derive traits

apache · Mar 16, 2021 · 2be8c35 · 2be8c35
1 parent cdaed0f
commit 2be8c35
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Showing 2 changed files with 5 additions and 17 deletions.
diff --git a/sgx_types/src/macros.rs b/sgx_types/src/macros.rs
@@ -89,14 +89,11 @@ macro_rules! __item {
 macro_rules! impl_copy_clone{
     ($($(#[$attr:meta])* pub struct $i:ident { $($field:tt)* })*) => ($(
         $crate::__item! {
+            #[derive(Copy, Clone, Debug, PartialEq)]
             #[repr(C)]
             $(#[$attr])*
             pub struct $i { $($field)* }
         }
-        impl Copy for $i {}
-        impl Clone for $i {
-            fn clone(&self) -> $i { *self }
-        }
     )*)
 }
 
@@ -119,14 +116,11 @@ macro_rules! s {
 macro_rules! impl_struct {
     ($($(#[$attr:meta])* pub struct $i:ident { $(pub $name:ident: $field:ty,)* })*) => ($(
         $crate::__item! {
+            #[derive(Copy, Clone, Debug, PartialEq)]
             #[repr(C)]
             $(#[$attr])*
             pub struct $i { $(pub $name: $field,)* }
         }
-        impl Copy for $i {}
-        impl Clone for $i {
-            fn clone(&self) -> $i { *self }
-        }
         impl Default for $i {
             fn default()->$i {
                 $i{$($name: Default::default(),)*}

diff --git a/sgx_types/src/types.rs b/sgx_types/src/types.rs
@@ -48,7 +48,6 @@ pub const SGX_XFRM_MPX: uint64_t              = 0x0000_0000_0000_0018;  // MPX -
 pub const SGX_XFRM_RESERVED: uint64_t         = !(SGX_XFRM_LEGACY | SGX_XFRM_AVX);
 
 impl_struct! {
-    #[derive(Debug, PartialEq)]
     pub struct sgx_attributes_t {
         pub flags: uint64_t,
         pub xfrm: uint64_t,
@@ -208,7 +207,6 @@ pub type sgx_config_svn_t = uint16_t;
 pub type sgx_config_id_t = [uint8_t; SGX_CONFIGID_SIZE];
 
 impl_struct! {
-    #[derive(Debug, PartialEq)]
     pub struct sgx_cpu_svn_t {
         pub svn: [uint8_t; SGX_CPUSVN_SIZE],
     }
@@ -433,7 +431,6 @@ pub type sgx_isvext_prod_id_t = [uint8_t; SGX_ISVEXT_PROD_ID_SIZE];
 pub type sgx_isvfamily_id_t = [uint8_t; SGX_ISV_FAMILY_ID_SIZE];
 
 impl_struct! {
-    #[derive(Debug, PartialEq)]
     pub struct sgx_measurement_t {
         pub m: [uint8_t; SGX_HASH_SIZE],
     }
@@ -442,7 +439,6 @@ impl_struct! {
 pub type sgx_mac_t = [uint8_t; SGX_MAC_SIZE];
 
 impl_copy_clone! {
-    #[derive(Debug, PartialEq)]
     pub struct sgx_report_data_t {
         pub d: [uint8_t; SGX_REPORT_DATA_SIZE],
     }
@@ -468,7 +464,6 @@ pub const SGX_REPORT_BODY_RESERVED3_BYTES: size_t = 32;
 pub const SGX_REPORT_BODY_RESERVED4_BYTES: size_t = 42;
 
 impl_copy_clone! {
-    #[derive(Debug, PartialEq)]
     pub struct sgx_target_info_t {
         pub mr_enclave: sgx_measurement_t,
         pub attributes: sgx_attributes_t,
@@ -480,7 +475,6 @@ impl_copy_clone! {
         pub reserved3: [uint8_t; SGX_TARGET_INFO_RESERVED3_BYTES],
     }
 
-    #[derive(Debug, PartialEq)]
     pub struct sgx_report_body_t {
         pub cpu_svn: sgx_cpu_svn_t,
         pub misc_select: sgx_misc_select_t,
@@ -896,7 +890,7 @@ pub const EXCEPTION_CONTINUE_EXECUTION: int32_t = -1;
 
 impl_enum! {
     #[repr(u32)]
-    #[derive(Copy, Clone, PartialEq, Eq)]
+    #[derive(Copy, Clone, PartialEq, Eq, Debug)]
     pub enum sgx_exception_vector_t {
         SGX_EXCEPTION_VECTOR_DE = 0,  /* DIV and DIV instructions */
         SGX_EXCEPTION_VECTOR_DB = 1,  /* For Intel use only */
@@ -914,7 +908,7 @@ impl_enum! {
 
 impl_enum! {
     #[repr(u32)]
-    #[derive(Copy, Clone, PartialEq, Eq)]
+    #[derive(Copy, Clone, PartialEq, Eq, Debug)]
     pub enum sgx_exception_type_t {
         SGX_EXCEPTION_HARDWARE = 3,
         SGX_EXCEPTION_SOFTWARE = 6,
@@ -1442,7 +1436,7 @@ pub const PLATFORM_INSTANCE_ID_SIZE: usize = 16;
 /* intel DCAP 1.7 */
 impl_enum! {
     #[repr(u32)]
-    #[derive(Copy, Clone, PartialEq, Eq)]
+    #[derive(Copy, Clone, PartialEq, Eq, Debug)]
     pub enum pck_cert_flag_enum_t {
         PCK_FLAG_FALSE = 0,
         PCK_FLAG_TRUE = 1,