[SVE] Add get_active_lane_mask builtin #16965
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Adds a `get_active_lane_mask` builtin and lowering to `llvm.get.active.lane.mask` intrinsic. This will be used in subsequent patches for expressing predicated buffer loads/stores in TIR. Further information can be found in the [RFC](https://github.com/apache/tvm-rfcs/blob/main/rfcs/0104-scalable-vectors-in-tir.md#predication). Co-authored-by: Elen Kalda <elen.kalda@arm.com> Co-authored-by: Neil Hickey <neil.hickey@arm.com> Change-Id: Id9d65f9f11503ad35dd0b3db4bfc81249a76f701
This was referenced May 3, 2024
tqchen
approved these changes
May 4, 2024
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Adds a
get_active_lane_maskbuiltin and lowering tollvm.get.active.lane.maskintrinsic. This will be used in subsequent patches for expressing predicated buffer loads/stores in TIR. Further information can be found in the RFC.Co-authored-by: Elen Kalda elen.kalda@arm.com
Co-authored-by: Neil Hickey neil.hickey@arm.com