Bugfix: resolve boot loader compilation issues on X96-mate and Orange…

…pizero2
armbian · Sep 19, 2024 · 8bc31a2 · 8bc31a2
1 parent 6ee98e7
commit 8bc31a2
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diff --git a/...n50i-h313-add-x96q-lpddr3-defconfig.patch → ...n50i-h313-add-x96q-lpddr3-defconfig.patch b/...n50i-h313-add-x96q-lpddr3-defconfig.patch → ...n50i-h313-add-x96q-lpddr3-defconfig.patch
diff --git a/patch/u-boot/u-boot-sunxi/board_x96-mate/sunsi-add-h616-internal-eth-phy-support.patch b/patch/u-boot/u-boot-sunxi/board_x96-mate/sunsi-add-h616-internal-eth-phy-support.patch
@@ -0,0 +1,205 @@
+diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
+index 74aed0d232a..091d52be962 100644
+--- a/arch/arm/dts/sun50i-h616.dtsi
++++ b/arch/arm/dts/sun50i-h616.dtsi
+@@ -209,6 +209,14 @@
+ 				bias-pull-up;
+ 			};
+
++			/omit-if-no-ref/
++			rmii_pins: rmii-pins {
++				pins = "PA0", "PA1", "PA2", "PA3", "PA4",
++				       "PA5", "PA6", "PA7", "PA8", "PA9";
++				function = "emac1";
++				drive-strength = <40>;
++			};
++
+ 			/omit-if-no-ref/
+ 			spi0_pins: spi0-pins {
+ 				pins = "PC0", "PC2", "PC4";
+@@ -504,6 +512,25 @@
+ 			};
+ 		};
+
++		emac1: ethernet@5030000 {
++			compatible = "allwinner,sun50i-h616-emac1";
++			syscon = <&syscon 1>;
++			reg = <0x05030000 0x10000>;
++			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "macirq";
++			resets = <&ccu RST_BUS_EMAC1>;
++			reset-names = "stmmaceth";
++			clocks = <&ccu CLK_BUS_EMAC1>;
++			clock-names = "stmmaceth";
++			status = "disabled";
++
++			mdio1: mdio {
++				compatible = "snps,dwmac-mdio";
++				#address-cells = <1>;
++				#size-cells = <0>;
++			};
++		};
++
+ 		usbotg: usb@5100000 {
+ 			compatible = "allwinner,sun50i-h616-musb",
+ 				     "allwinner,sun8i-h3-musb";
+diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h b/arch/arm/include/asm/arch-sunxi/i2c.h
+index f0da46d863c..914f16b2c46 100644
+--- a/arch/arm/include/asm/arch-sunxi/i2c.h
++++ b/arch/arm/include/asm/arch-sunxi/i2c.h
+@@ -13,6 +13,9 @@
+ #ifdef CONFIG_I2C1_ENABLE
+ #define CFG_I2C_MVTWSI_BASE1	SUNXI_TWI1_BASE
+ #endif
++#ifdef CONFIG_I2C3_ENABLE
++#define CONFIG_I2C_MVTWSI_BASE3	SUNXI_TWI3_BASE
++#endif
+ #ifdef CONFIG_R_I2C_ENABLE
+ #define CFG_I2C_MVTWSI_BASE2 SUNXI_R_TWI_BASE
+ #endif
+diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
+index 6dcbb096f74..fa9d67e09a0 100644
+--- a/arch/arm/mach-sunxi/Kconfig
++++ b/arch/arm/mach-sunxi/Kconfig
+@@ -771,6 +771,15 @@ config I2C1_ENABLE
+ 	---help---
+ 	See I2C0_ENABLE help text.
+
++if MACH_SUN50I_H616
++config I2C3_ENABLE
++	bool "Enable I2C/TWI controller 3"
++	default n
++	select CMD_I2C
++	---help---
++	See I2C0_ENABLE help text.
++endif
++
+ if SUNXI_GEN_SUN6I || SUN50I_GEN_H6
+ config R_I2C_ENABLE
+ 	bool "Enable the PRCM I2C/TWI controller"
+diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
+index 391a65a5495..b44e741627e 100644
+--- a/arch/arm/mach-sunxi/board.c
++++ b/arch/arm/mach-sunxi/board.c
+@@ -460,6 +460,7 @@ void board_init_f(ulong dummy)
+ 	/* Needed early by sunxi_board_init if PMU is enabled */
+ 	i2c_init_board();
+ 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
++	i2c_set_bus_num(0);
+ #endif
+ 	sunxi_board_init();
+ }
+diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c
+index 7926394cf76..7c84d731f84 100644
+--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c
++++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c
+@@ -46,6 +46,10 @@ void clock_init_safe(void)
+ 	 * DRAM initialization code.
+ 	 */
+ 	writel(MBUS_CLK_SRC_PLL6X2 | MBUS_CLK_M(3), &ccm->mbus_cfg);
++
++	writel(0x10001, 0x030017ac);
++	writel(0x50, 0x0300a028);
++	writel(0x20, 0x0300a040);
+ }
+ #endif
+
+diff --git a/board/sunxi/board.c b/board/sunxi/board.c
+index f321cd58a6e..d5633ad5ca6 100644
+--- a/board/sunxi/board.c
++++ b/board/sunxi/board.c
+@@ -15,6 +15,7 @@
+ #include <dm.h>
+ #include <env.h>
+ #include <hang.h>
++#include <i2c.h>
+ #include <image.h>
+ #include <init.h>
+ #include <log.h>
+@@ -107,6 +108,17 @@ void i2c_init_board(void)
+ #endif
+ #endif
+
++#ifdef CONFIG_I2C3_ENABLE
++#if defined(CONFIG_MACH_SUN50I_H616)
++	sunxi_gpio_set_cfgpin(SUNXI_GPA(10), 2);
++	sunxi_gpio_set_cfgpin(SUNXI_GPA(11), 2);
++	sunxi_gpio_set_cfgpin(SUNXI_GPA(12), 2);
++	sunxi_gpio_set_pull(SUNXI_GPA(10), SUNXI_GPIO_PULL_UP);
++	sunxi_gpio_set_pull(SUNXI_GPA(11), SUNXI_GPIO_PULL_UP);
++	clock_twi_onoff(3, 1);
++#endif
++#endif
++
+ #ifdef CONFIG_R_I2C_ENABLE
+ #ifdef CONFIG_MACH_SUN50I
+ 	clock_twi_onoff(5, 1);
+@@ -572,6 +584,7 @@ static void sunxi_spl_store_dram_size(phys_addr_t dram_size)
+ void sunxi_board_init(void)
+ {
+ 	int power_failed = 0;
++	u8 data[2];
+
+ #ifdef CONFIG_LED_STATUS
+ 	if (IS_ENABLED(CONFIG_SPL_DRIVERS_MISC))
+@@ -666,6 +679,23 @@ void sunxi_board_init(void)
+ 		clock_set_pll1(get_board_sys_clk());
+ 	else
+ 		printf("Failed to set core voltage! Can't set CPU frequency\n");
++
++	i2c_set_bus_num(1);
++	data[0] = 0;
++	data[1] = 0;
++	i2c_write(0x10, 0xfe, 1, data, 2);
++	i2c_write(0x10, 2, 1, data, 2);
++	data[1] = 1;
++	i2c_write(0x10, 2, 1, data, 2);
++	data[1] = 0xf;
++	i2c_write(0x10, 0x16, 1, data, 2);
++	data[1] = 3;
++	i2c_write(0x10, 0x14, 1, data, 2);
++	data[1] = 0x60;
++	i2c_write(0x10, 0xfe, 1, data, 2);
++	data[0] = 0x08;
++	data[1] = 0x14;
++	i2c_write(0x10, 0, 1, data, 2);
+ }
+ #endif /* CONFIG_SPL_BUILD */
+
+diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
+index 04c3274fbe1..d0b80d4cec1 100644
+--- a/drivers/net/sun8i_emac.c
++++ b/drivers/net/sun8i_emac.c
+@@ -909,6 +909,11 @@ static const struct emac_variant emac_variant_h6 = {
+ 	.support_rmii		= true,
+ };
+
++static const struct emac_variant emac_variant_h616_1 = {
++	.syscon_offset		= 0x34,
++	.support_rmii		= true,
++};
++
+ static const struct udevice_id sun8i_emac_eth_ids[] = {
+ 	{ .compatible = "allwinner,sun8i-a83t-emac",
+ 	  .data = (ulong)&emac_variant_a83t },
+@@ -920,6 +925,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = {
+ 	  .data = (ulong)&emac_variant_a64 },
+ 	{ .compatible = "allwinner,sun50i-h6-emac",
+ 	  .data = (ulong)&emac_variant_h6 },
++	{ .compatible = "allwinner,sun50i-h616-emac1",
++	  .data = (ulong)&emac_variant_h616_1 },
+ 	{ }
+ };
+
+diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+index e5102180902..8f4517c177f 100644
+--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
++++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+@@ -710,6 +710,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h6_r_pinctrl_desc =
+
+ static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = {
+ 	{ "emac0",	2 },	/* PI0-PI16 */
++	{ "emac1",	2 },	/* PA0-PA9 */
+ 	{ "gpio_in",	0 },
+ 	{ "gpio_out",	1 },
+ 	{ "mmc0",	2 },	/* PF0-PF5 */