Add riscv32 support-I

blue-freedom-technologies · Jan 10, 2024 · 41d6076 · 41d6076
1 parent 49c9f56
commit 41d6076
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Showing 2 changed files with 1 addition and 1 deletion.
diff --git a/include/ring-core/target.h b/include/ring-core/target.h
@@ -52,7 +52,6 @@
 #define OPENSSL_RISCV64
 #elif defined(__riscv) && __SIZEOF_POINTER__ == 4
 #define OPENSSL_32_BIT
-#define OPENSSL_RISCV32
 #elif defined(__s390x__)
 #define OPENSSL_64_BIT
 #define OPENSSL_S390X

diff --git a/src/rand.rs b/src/rand.rs
@@ -143,6 +143,7 @@ impl crate::sealed::Sealed for SystemRandom {}
     target_os = "tvos",
     target_os = "vita",
     target_os = "windows",
+    target_os = "espidf",
     all(
         target_arch = "wasm32",
         any(