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Frame Firmware & RTL Codebase

Welcome to the complete codebase of the Frame hardware. For regular usage, check out the docs here.

System architecture

The codebase is split into three sections. The nRF52 Application, the nRF52 Bootloader, and the FPGA RTL.

The nRF52 is designed to handle the overall system operation. It runs Lua, as well as handle Bluetooth networking, AI tasks and power management. The FPGA meanwhile, simply handles acceleration of the graphics and camera.

Frame system architecture diagram

Getting started with nRF52 firmware development

  1. Ensure you have the ARM GCC Toolchain installed.

  2. Ensure you have the nRF Command Line Tools installed.

  3. Ensure you have nRF Util installed, along with the device and nrf5sdk-tools subcommands.

    ./nrfutil install device
    ./nrfutil install nrf5sdk-tools
  4. Clone this repository and initialize any submodules:

    git clone https://github.com/brilliantlabsAR/frame-codebase.git
    
    cd frame-codebase
    
    git submodule update --init
  5. You should now be able to build and flash the project to an nRF52840 DK by calling the following commands from the frame-codebase folder.

    make release
    make erase-jlink # Unlocks the flash protection if needed
    make flash-jlink

Debugging

  1. Open the project in VSCode.

    There are some build tasks already configured within .vscode/tasks.json. Access them by pressing Ctrl-Shift-P (Cmd-Shift-P on MacOS) → Tasks: Run Task.

    Try running the Build task. The project should build normally.

    You many need to unlock the device by using the Erase task before programming or debugging.

  2. To enable IntelliSense, be sure to select the correct compiler from within VSCode. Ctrl-Shift-P (Cmd-Shift-P on MacOS) → C/C++: Select IntelliSense ConfigurationUse arm-none-eabi-gcc.

  3. Install the Cortex-Debug extension for VSCode in order to enable debugging.

  4. A debugging launch is already configured within .vscode/launch.json. Run the Application (J-Link) launch configuration from the Run and Debug panel, or press F5. The project will automatically build and flash before launching.

  5. To monitor the logs, run the task RTT Console (J-Link) and ensure the Application (J-Link) launch configuration is running.

  6. To debug using Black Magic Probes, follow the instructions here.

Getting started with FPGA development

For quickly getting up and running, the accelerators which run on the FPGA are already pre-built and bundled within this repo. If you wish to modify the FPGA RTL, you will need to rebuild the fpga_application.h file which contains the entire FPGA application.

  1. Ensure you have the Yosys installed.

  2. Ensure you have the Project Oxide installed.

  3. Ensure you have the nextpnr installed.

  4. MacOS users can do the above three steps in one using Homebrew.

    brew install --HEAD siliconwitchery/oss-fpga/nextpnr-nexus
  5. You should now be able to rebuild the project by calling make:

    make fpga/fpga_application.h

To understand more around how the FPGA RTL works. Check the documentation here.