mv map_reg

bytecodealliance · Mar 10, 2020 · b427ffc · b427ffc
1 parent 547974f
commit b427ffc
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Showing 3 changed files with 64 additions and 59 deletions.
diff --git a/crates/debug/src/transform/expression.rs b/crates/debug/src/transform/expression.rs
@@ -1,11 +1,12 @@
 use super::address_transform::AddressTransform;
-use anyhow::{bail, Context, Error, Result};
-use gimli::{self, write, Expression, Operation, Reader, ReaderOffset, Register, X86_64};
+use super::map_reg::map_reg;
+use anyhow::{Context, Error, Result};
+use gimli::{self, write, Expression, Operation, Reader, ReaderOffset, X86_64};
 use more_asserts::{assert_le, assert_lt};
 use std::collections::{HashMap, HashSet};
 use wasmtime_environ::entity::EntityRef;
 use wasmtime_environ::ir::{StackSlots, ValueLabel, ValueLabelsRanges, ValueLoc};
-use wasmtime_environ::isa::{RegUnit, TargetIsa};
+use wasmtime_environ::isa::TargetIsa;
 use wasmtime_environ::wasm::{get_vmctx_value_label, DefinedFuncIndex};
 use wasmtime_environ::ModuleMemoryOffset;
 
@@ -70,61 +71,6 @@ impl<'a> CompiledExpression<'a> {
     }
 }
 
-pub(crate) fn map_reg(isa: &dyn TargetIsa, reg: RegUnit) -> Result<Register> {
-    // TODO avoid duplication with fde.rs
-    assert!(isa.name() == "x86" && isa.pointer_bits() == 64);
-    // Mapping from https://github.com/bytecodealliance/cranelift/pull/902 by @iximeow
-    const X86_GP_REG_MAP: [gimli::Register; 16] = [
-        X86_64::RAX,
-        X86_64::RCX,
-        X86_64::RDX,
-        X86_64::RBX,
-        X86_64::RSP,
-        X86_64::RBP,
-        X86_64::RSI,
-        X86_64::RDI,
-        X86_64::R8,
-        X86_64::R9,
-        X86_64::R10,
-        X86_64::R11,
-        X86_64::R12,
-        X86_64::R13,
-        X86_64::R14,
-        X86_64::R15,
-    ];
-    const X86_XMM_REG_MAP: [gimli::Register; 16] = [
-        X86_64::XMM0,
-        X86_64::XMM1,
-        X86_64::XMM2,
-        X86_64::XMM3,
-        X86_64::XMM4,
-        X86_64::XMM5,
-        X86_64::XMM6,
-        X86_64::XMM7,
-        X86_64::XMM8,
-        X86_64::XMM9,
-        X86_64::XMM10,
-        X86_64::XMM11,
-        X86_64::XMM12,
-        X86_64::XMM13,
-        X86_64::XMM14,
-        X86_64::XMM15,
-    ];
-    let reg_info = isa.register_info();
-    let bank = reg_info.bank_containing_regunit(reg).unwrap();
-    match bank.name {
-        "IntRegs" => {
-            // x86 GP registers have a weird mapping to DWARF registers, so we use a
-            // lookup table.
-            Ok(X86_GP_REG_MAP[(reg - bank.first_unit) as usize])
-        }
-        "FloatRegs" => Ok(X86_XMM_REG_MAP[(reg - bank.first_unit) as usize]),
-        bank_name => {
-            bail!("unsupported register bank: {}", bank_name);
-        }
-    }
-}
-
 fn translate_loc(
     loc: ValueLoc,
     frame_info: Option<&FunctionFrameInfo>,

diff --git a/crates/debug/src/transform/map_reg.rs b/crates/debug/src/transform/map_reg.rs
@@ -0,0 +1,58 @@
+use anyhow::{bail, Result};
+use gimli::{Register, X86_64};
+use wasmtime_environ::isa::{RegUnit, TargetIsa};
+
+pub(crate) fn map_reg(isa: &dyn TargetIsa, reg: RegUnit) -> Result<Register> {
+    // TODO avoid duplication with fde.rs
+    assert!(isa.name() == "x86" && isa.pointer_bits() == 64);
+    // Mapping from https://github.com/bytecodealliance/cranelift/pull/902 by @iximeow
+    const X86_GP_REG_MAP: [Register; 16] = [
+        X86_64::RAX,
+        X86_64::RCX,
+        X86_64::RDX,
+        X86_64::RBX,
+        X86_64::RSP,
+        X86_64::RBP,
+        X86_64::RSI,
+        X86_64::RDI,
+        X86_64::R8,
+        X86_64::R9,
+        X86_64::R10,
+        X86_64::R11,
+        X86_64::R12,
+        X86_64::R13,
+        X86_64::R14,
+        X86_64::R15,
+    ];
+    const X86_XMM_REG_MAP: [Register; 16] = [
+        X86_64::XMM0,
+        X86_64::XMM1,
+        X86_64::XMM2,
+        X86_64::XMM3,
+        X86_64::XMM4,
+        X86_64::XMM5,
+        X86_64::XMM6,
+        X86_64::XMM7,
+        X86_64::XMM8,
+        X86_64::XMM9,
+        X86_64::XMM10,
+        X86_64::XMM11,
+        X86_64::XMM12,
+        X86_64::XMM13,
+        X86_64::XMM14,
+        X86_64::XMM15,
+    ];
+    let reg_info = isa.register_info();
+    let bank = reg_info.bank_containing_regunit(reg).unwrap();
+    match bank.name {
+        "IntRegs" => {
+            // x86 GP registers have a weird mapping to DWARF registers, so we use a
+            // lookup table.
+            Ok(X86_GP_REG_MAP[(reg - bank.first_unit) as usize])
+        }
+        "FloatRegs" => Ok(X86_XMM_REG_MAP[(reg - bank.first_unit) as usize]),
+        bank_name => {
+            bail!("unsupported register bank: {}", bank_name);
+        }
+    }
+}
diff --git a/crates/debug/src/transform/mod.rs b/crates/debug/src/transform/mod.rs
@@ -14,12 +14,13 @@ use wasmtime_environ::isa::TargetIsa;
 use wasmtime_environ::{ModuleAddressMap, ModuleVmctxInfo, ValueLabelsRanges};
 
 pub use address_transform::AddressTransform;
-pub(crate) use expression::map_reg;
+pub(crate) use map_reg::map_reg;
 
 mod address_transform;
 mod attr;
 mod expression;
 mod line_program;
+mod map_reg;
 mod range_info_builder;
 mod refs;
 mod simulate;