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Restore the ARM register naming from v4. #2108

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Jul 23, 2023
Merged

Restore the ARM register naming from v4. #2108

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4 changes: 2 additions & 2 deletions arch/ARM/ARMGenRegisterName_digit.inc
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Original file line number Diff line number Diff line change
Expand Up @@ -74,7 +74,7 @@ static const char *getRegisterName_digit(unsigned RegNo)
/* 481 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0,
/* 497 */ 'd', '1', '3', 0,
/* 501 */ 'q', '1', '3', 0,
/* 505 */ 'r', '1', '3', 0,
/* 505 */ 's', 'p', 0, 0,
/* 509 */ 's', '1', '3', 0,
/* 513 */ 'D', '1', '7', '_', 'D', '1', '9', '_', 'D', '2', '1', '_', 'D', '2', '3', 0,
/* 529 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0,
Expand All @@ -93,7 +93,7 @@ static const char *getRegisterName_digit(unsigned RegNo)
/* 625 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0,
/* 641 */ 'd', '1', '4', 0,
/* 645 */ 'q', '1', '4', 0,
/* 649 */ 'r', '1', '4', 0,
/* 649 */ 'l', 'r', 0, 0,
/* 653 */ 's', '1', '4', 0,
/* 657 */ 'D', '1', '8', '_', 'D', '2', '0', '_', 'D', '2', '2', '_', 'D', '2', '4', 0,
/* 673 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0,
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6 changes: 4 additions & 2 deletions suite/synctools/tablegen/ARM/ARMRegisterInfo-digit.td
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Expand Up @@ -84,8 +84,10 @@ def R9 : ARMReg< 9, "r9">, DwarfRegNum<[9]>;
def R10 : ARMReg<10, "r10">, DwarfRegNum<[10]>;
def R11 : ARMReg<11, "r11">, DwarfRegNum<[11]>;
def R12 : ARMReg<12, "r12">, DwarfRegNum<[12]>;
def SP : ARMReg<13, "r13">, DwarfRegNum<[13]>;
def LR : ARMReg<14, "r14">, DwarfRegNum<[14]>;
// R13 and R14 were given names in Capstone 4, even when the CS_OPT_SYNTAX_NOREGNAME option was specified,
// so here they are given these names as well. See https://github.com/capstone-engine/capstone/issues/2078
def SP : ARMReg<13, "sp">, DwarfRegNum<[13]>;
def LR : ARMReg<14, "lr">, DwarfRegNum<[14]>;
def PC : ARMReg<15, "pc">, DwarfRegNum<[15]>;
}

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