Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Prepare for release v5.0.1 #2143

Merged
merged 14 commits into from
Aug 21, 2023
22 changes: 22 additions & 0 deletions ChangeLog
Original file line number Diff line number Diff line change
@@ -1,5 +1,27 @@
This file details the changelog of Capstone.

-----------------------------
Version 5.0.1: August 21th, 2023

## What's Changed
* Release V5.0 by @kabeor in https://github.com/capstone-engine/capstone/pull/2076
* [ARM] Fix VFP feature check by @Rot127 in https://github.com/capstone-engine/capstone/pull/2090
* Restore the ARM register naming from v4. by @gerph in https://github.com/capstone-engine/capstone/pull/2108
* Use OS independent printf formatting. by @Rot127 in https://github.com/capstone-engine/capstone/pull/2109
* Cherry-pick from next for v5.0.1 by @kabeor in https://github.com/capstone-engine/capstone/pull/2141
* Add Python bindings for WASM by @peace-maker https://github.com/capstone-engine/capstone/pull/2095
* Sync Python bindings for x86, m68k, and mos65xx by @peace-maker https://github.com/capstone-engine/capstone/pull/2100
* Add Python bindings for SH by @peace-maker https://github.com/capstone-engine/capstone/pull/2096
* Update Python binding constants by @peace-maker https://github.com/capstone-engine/capstone/pull/2097
* Fixing TriCore disasm instructions by @bkoppelmann https://github.com/capstone-engine/capstone/pull/2088
* allow absolute CMAKE_INSTALL_*DIR @chayleaf https://github.com/capstone-engine/capstone/pull/2134

## New Contributors
* @gerph made their first contribution in https://github.com/capstone-engine/capstone/pull/2108
* @bkoppelmann made their first contribution in https://github.com/capstone-engine/capstone/pull/2088
* @chayleaf made their first contribution in https://github.com/capstone-engine/capstone/pull/2134


-----------------------------
Version 5.0.0: July 5th, 2023

Expand Down
150 changes: 75 additions & 75 deletions bindings/const_generator.py
Original file line number Diff line number Diff line change
Expand Up @@ -80,81 +80,81 @@
'comment_open': '(*',
'comment_close': ' *)',
},
'swift': {
'header': "// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT (%s)\n\n",
'footer': "",
'enum_doc': '/// %s\n',
'enum_header': 'public enum %s: %s {\n',
'enum_default_type': 'UInt32',
'enum_types': {
'UInt16': r'^\w+Reg$',
'UInt8': r'^\w+Grp$'
},
'option_set_header': 'public struct %s: OptionSet {\n public typealias RawValue = %s\n public let rawValue: RawValue\n public init(rawValue: RawValue) { self.rawValue = rawValue }\n',
'option_sets': {
'X86Eflags': 'UInt64',
'X86FpuFlags': 'UInt64',
'SparcHint': 'UInt32',
'M680xIdx': 'UInt8',
'M680xOpFlags': 'UInt8',
},
'rename': {
r'^M680X_(\w+_OP_IN_MNEM)$': r'M680X_OP_FLAGS_\1',
},
'option_format': ' public static let {option} = {type}(rawValue: {value})\n',
'enum_extra_options': {
# swift enum != OptionSet, so options must be specified
'ArmSysreg': {
'spsrCx': 'spsrC + spsrX',
'spsrCs': 'spsrC + spsrS',
'spsrXs': 'spsrX + spsrS',
'spsrCxs': 'spsrC + spsrX + spsrS',
'spsrCf': 'spsrC + spsrF',
'spsrXf': 'spsrX + spsrF',
'spsrCxf': 'spsrC + spsrX + spsrF',
'spsrSf': 'spsrS + spsrF',
'spsrCsf': 'spsrC + spsrS + spsrF',
'spsrXsf': 'spsrX + spsrS + spsrF',
'spsrCxsf': 'spsrC + spsrX + spsrS + spsrF',
'cpsrCx': 'cpsrC + cpsrX',
'cpsrCs': 'cpsrC + cpsrS',
'cpsrXs': 'cpsrX + cpsrS',
'cpsrCxs': 'cpsrC + cpsrX + cpsrS',
'cpsrCf': 'cpsrC + cpsrF',
'cpsrXf': 'cpsrX + cpsrF',
'cpsrCxf': 'cpsrC + cpsrX + cpsrF',
'cpsrSf': 'cpsrS + cpsrF',
'cpsrCsf': 'cpsrC + cpsrS + cpsrF',
'cpsrXsf': 'cpsrX + cpsrS + cpsrF',
'cpsrCxsf': 'cpsrC + cpsrX + cpsrS + cpsrF',
}
},
'enum_footer': '}\n\n',
'doc_line_format': ' /// %s\n',
'line_format': ' case %s = %s\n',
'dup_line_format': ' public static let %s = %s\n',
'out_file': './swift/Sources/Capstone/%sEnums.swift',
'reserved_words': [
'break', 'class', 'for', 'false', 'in', 'init', 'return', 'true'
],
'reserved_word_format': '`%s`',
# prefixes for constant filenames of all archs - case sensitive
'arm.h': 'Arm',
'arm64.h': 'Arm64',
'm68k.h': 'M68k',
'mips.h': 'Mips',
'x86.h': 'X86',
'ppc.h': 'Ppc',
'sparc.h': 'Sparc',
'systemz.h': 'Sysz',
'xcore.h': 'Xcore',
'tms320c64x.h': 'TMS320C64x',
'm680x.h': 'M680x',
'evm.h': 'Evm',
'mos65xx.h': 'Mos65xx',
'comment_open': '\t//',
'comment_close': '',
},
# 'swift': {
# 'header': "// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT (%s)\n\n",
# 'footer': "",
# 'enum_doc': '/// %s\n',
# 'enum_header': 'public enum %s: %s {\n',
# 'enum_default_type': 'UInt32',
# 'enum_types': {
# 'UInt16': r'^\w+Reg$',
# 'UInt8': r'^\w+Grp$'
# },
# 'option_set_header': 'public struct %s: OptionSet {\n public typealias RawValue = %s\n public let rawValue: RawValue\n public init(rawValue: RawValue) { self.rawValue = rawValue }\n',
# 'option_sets': {
# 'X86Eflags': 'UInt64',
# 'X86FpuFlags': 'UInt64',
# 'SparcHint': 'UInt32',
# 'M680xIdx': 'UInt8',
# 'M680xOpFlags': 'UInt8',
# },
# 'rename': {
# r'^M680X_(\w+_OP_IN_MNEM)$': r'M680X_OP_FLAGS_\1',
# },
# 'option_format': ' public static let {option} = {type}(rawValue: {value})\n',
# 'enum_extra_options': {
# # swift enum != OptionSet, so options must be specified
# 'ArmSysreg': {
# 'spsrCx': 'spsrC + spsrX',
# 'spsrCs': 'spsrC + spsrS',
# 'spsrXs': 'spsrX + spsrS',
# 'spsrCxs': 'spsrC + spsrX + spsrS',
# 'spsrCf': 'spsrC + spsrF',
# 'spsrXf': 'spsrX + spsrF',
# 'spsrCxf': 'spsrC + spsrX + spsrF',
# 'spsrSf': 'spsrS + spsrF',
# 'spsrCsf': 'spsrC + spsrS + spsrF',
# 'spsrXsf': 'spsrX + spsrS + spsrF',
# 'spsrCxsf': 'spsrC + spsrX + spsrS + spsrF',
# 'cpsrCx': 'cpsrC + cpsrX',
# 'cpsrCs': 'cpsrC + cpsrS',
# 'cpsrXs': 'cpsrX + cpsrS',
# 'cpsrCxs': 'cpsrC + cpsrX + cpsrS',
# 'cpsrCf': 'cpsrC + cpsrF',
# 'cpsrXf': 'cpsrX + cpsrF',
# 'cpsrCxf': 'cpsrC + cpsrX + cpsrF',
# 'cpsrSf': 'cpsrS + cpsrF',
# 'cpsrCsf': 'cpsrC + cpsrS + cpsrF',
# 'cpsrXsf': 'cpsrX + cpsrS + cpsrF',
# 'cpsrCxsf': 'cpsrC + cpsrX + cpsrS + cpsrF',
# }
# },
# 'enum_footer': '}\n\n',
# 'doc_line_format': ' /// %s\n',
# 'line_format': ' case %s = %s\n',
# 'dup_line_format': ' public static let %s = %s\n',
# 'out_file': './swift/Sources/Capstone/%sEnums.swift',
# 'reserved_words': [
# 'break', 'class', 'for', 'false', 'in', 'init', 'return', 'true'
# ],
# 'reserved_word_format': '`%s`',
# # prefixes for constant filenames of all archs - case sensitive
# 'arm.h': 'Arm',
# 'arm64.h': 'Arm64',
# 'm68k.h': 'M68k',
# 'mips.h': 'Mips',
# 'x86.h': 'X86',
# 'ppc.h': 'Ppc',
# 'sparc.h': 'Sparc',
# 'systemz.h': 'Sysz',
# 'xcore.h': 'Xcore',
# 'tms320c64x.h': 'TMS320C64x',
# 'm680x.h': 'M680x',
# 'evm.h': 'Evm',
# 'mos65xx.h': 'Mos65xx',
# 'comment_open': '\t//',
# 'comment_close': '',
# },
}

# markup for comments to be added to autogen files
Expand Down
Loading