refactor TLBPermissions to chisel3. (#3055)

chipsalliance · Oct 3, 2022 · f45ca51 · f45ca51
1 parent 28bfb10
commit f45ca51
Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/src/main/scala/rocket/TLBPermissions.scala b/src/main/scala/rocket/TLBPermissions.scala
@@ -2,7 +2,8 @@
 
 package freechips.rocketchip.rocket
 
-import Chisel._
+import chisel3._
+import chisel3.util.isPow2
 
 import freechips.rocketchip.diplomacy._
 import freechips.rocketchip.tilelink._