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Use static priority arbitration in PTW #2433

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Apr 25, 2020
Merged

Use static priority arbitration in PTW #2433

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2 changes: 1 addition & 1 deletion src/main/scala/rocket/PTW.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -102,7 +102,7 @@ class PTW(n: Int)(implicit edge: TLEdgeOut, p: Parameters) extends CoreModule()(
val s_ready :: s_req :: s_wait1 :: s_dummy1 :: s_wait2 :: s_wait3 :: s_dummy2 :: s_fragment_superpage :: Nil = Enum(UInt(), 8)
val state = Reg(init=s_ready)

val arb = Module(new RRArbiter(Valid(new PTWReq), n))
val arb = Module(new Arbiter(Valid(new PTWReq), n))
arb.io.in <> io.requestor.map(_.req)
arb.io.out.ready := state === s_ready

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2 changes: 1 addition & 1 deletion src/main/scala/tile/LazyRoCC.scala
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Expand Up @@ -88,7 +88,7 @@ trait HasLazyRoCCModule extends CanHavePTWModule
val respArb = Module(new RRArbiter(new RoCCResponse()(outer.p), outer.roccs.size))
val cmdRouter = Module(new RoccCommandRouter(outer.roccs.map(_.opcodes))(outer.p))
outer.roccs.zipWithIndex.foreach { case (rocc, i) =>
ptwPorts ++= rocc.module.io.ptw
rocc.module.io.ptw ++=: ptwPorts
rocc.module.io.cmd <> cmdRouter.io.out(i)
val dcIF = Module(new SimpleHellaCacheIF()(outer.p))
dcIF.io.requestor <> rocc.module.io.mem
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