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RVV 0.9: Tighten fractional LMUL-SEW constraint #2484

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merged 1 commit into from
May 23, 2020

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aswaterman
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The spec requires that implementations support fractional LMUL settings
for LMUL ≥ SEW/ELEN. The old code enforced the looser constraint that
LMUL ≥ SEW/VLEN, so e.g. if VLEN were twice ELEN, we would support one
notch smaller LMUL for any given SEW.

Tightening the constraint will catch software bugs that rely on vtype
settings that aren't guaranteed to be supported across implemenetations.
The space of configurations that need to be verified is also reduced.

Type of change: other enhancement

Impact: API modification

Development Phase: implementation

The spec requires that implementations support fractional LMUL settings
for LMUL ≥ SEW/ELEN.  The old code enforced the looser constraint that
LMUL ≥ SEW/VLEN, so e.g. if VLEN were twice ELEN, we would support one
notch smaller LMUL for any given SEW.

Tightening the constraint will catch software bugs that rely on vtype
settings that aren't guaranteed to be supported across implemenetations.
The space of configurations that need to be verified is also reduced.
@aswaterman aswaterman force-pushed the tighten-fractional-lmul-constraint branch from be150a3 to d1cce9f Compare May 22, 2020 21:40
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@solomatnikov solomatnikov left a comment

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LGTM

My reading of spec is that this is a requirement: riscvarchive/riscv-v-spec#479 (comment)
riscvarchive/riscv-v-spec#479 (comment)

Other people also thought the same way: riscvarchive/riscv-v-spec#479 (comment)

@aswaterman
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Ah, thanks for the pointer. I support tightening the spec (or clarifying, depending on your POV).

@aswaterman aswaterman merged commit 6249be3 into master May 23, 2020
@aswaterman aswaterman deleted the tighten-fractional-lmul-constraint branch May 23, 2020 12:08
aswaterman added a commit that referenced this pull request Jun 8, 2020
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2 participants