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chipsalliance / rocket-chip Public

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Add CreditedIO to support register-register interfacing for AXI4 and TL#2555

Merged

rmac-sifive merged 9 commits intomasterchipsalliance/rocket-chip:masterfrom credited-iochipsalliance/rocket-chip:credited-ioCopy head branch name to clipboard

Jul 29, 2020

+553-2

Conversation Commits9 (9)Checks Files changed

Commits

Commits on Jul 14, 2020

CreditedIO: credit/debit-based flow control primitive
terpstra
committed
tilelink: add CreditedIO support for TL parameters, bundles, and nodes
terpstra
committed
tilelink: add adapter hardware for CreditedIO-enabled TileLink
terpstra
committed
axi4: add CreditedIO support for TL parameters, bundles, and nodes
terpstra
committed
axi4: add Credited adapter hardware
terpstra
committed
diplomacy: add CreditedCrossing as a new crossing type
terpstra
committed

Commits on Jul 15, 2020

tilelink: add CreditedIO unit tests
terpstra
committed
AXI4: add CreditedIO unit tests
terpstra
committed
CreditedIO: fix bug when source.valid is high during reset
terpstra
committed

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