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Core/TLB: cacheable when supportsAcquireB #2808

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merged 1 commit into from
Apr 9, 2021
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@ingallsj ingallsj commented Apr 9, 2021

Related issue: revert 1867a5b from #1039

Type of change: bug report | feature request | other enhancement
The Rocket TLB calculates cacheable = supportsAcquireT, but Diplomacy calculates cacheable = supportsAcquireB.
This cacheability mismatch risks causing problems.

Impact: functional change

  1. Set cacheable = supportsAcquireB.
  2. Require that cacheable writeable memory supportsAcquireT.

Development Phase: implementation

Release Notes
Cacheable ROMs: treat acquire-able read-only memory as cacheable.

@ingallsj ingallsj merged commit ba262df into master Apr 9, 2021
@ingallsj ingallsj deleted the cacheableAcquireB branch April 9, 2021 22:35
kenzhang82 added a commit to kenzhang82/rocket-chip that referenced this pull request Apr 12, 2021
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2 participants