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FESVR: Bump riscv-isa-sim to the latest to pick up DMACTIVE fix #5
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Note this pulls in a bunch of other changes, I am not familiar if those will cause other issues. |
🤞
…On Mon, Feb 10, 2020 at 11:51 AM Megan Wachs ***@***.***> wrote:
Note this pulls in a bunch of other changes, I am not familiar if those
will cause other issues.
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They caused other issues :( I think we'll need to look at riscv-tests as well. |
FYI @erikdanie... working to get a set of OpenOCD/GDB/riscv-tests that passes all tests. |
@aswaterman , @jim-wilson I am not entirely sure the |
@mwachs5 I confirmed that it's building the right one, and that --disable-gdb worked. |
Thanks @timsifive . FSF 8.3.1 resolved the failing test. Hoping this passes all tests now. |
@aswaterman does your approval still count against this much bigger PR? |
Yes (thanks for checking :)) |
@mwachs5 Should I try running the fpgatests with this? If so, how do I pick it up? |
See description(s) in
riscv-software-src/riscv-isa-sim#392
chipsalliance/rocket-chip#2205
riscv-collab/riscv-openocd@906635c
This PR has massively increased in scope. In order to be able to bump spike annd OpenOCD, we also need to bump riscv-tests and GDB. It turns out GDB is now better maintained on FSF not riscv-binutils-gdb, so this PR is now attempting to install the FSF version instead.