CachePadded: double cache size on aarch64 #499
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636: CachePadded: update alignment based on golang's CacheLinePadSize r=jeehoonkang a=taiki-e This updates alignment of `CachePadded` on the following architectures based on golang's [`CacheLinePadSize`](https://github.com/golang/go/blob/3510a1e32cbc86b73db143aefcc00aadc44c27bd/src/internal/cpu/cpu.go#L20). - On [powerpc64](https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_ppc64x.go#L9), use 128-byte alignment. - On [arm](https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_arm.go#L7), [mips](https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_mips.go#L7), [mips64](https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_mips64x.go#L9), and [riscv64](https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_riscv64.go#L7), use 32-byte alignment. - On [s390x](https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_s390x.go#L7), use 256-byte alignment. On x86_64 and aarch64, use 128-byte alignment as before. See #331 and #499 for reasons. On all others, use 64-byte alignment as before. Closes #427 cc @stjepang (when this merged, I'll send a same patch to smol-rs/cache-padded) FYI @yoshuawuyts @cuviper (because you all were [discussing about adding `CachePadded` to the standard library](https://rust-lang.zulipchat.com/#narrow/stream/219381-t-libs/topic/.60std.3A.3Amem.3A.3ACachePadded.60)) Co-authored-by: Taiki Endo <te316e89@gmail.com>
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"Big" cores on ARM's bigLITTLE architecture do have 128 byte cache line according to this article
https://www.mono-project.com/news/2016/09/12/arm64-icache/
(it is also sourced in the code)
This has not been benchmarked (I just do not have the hardware to do so)