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.gitignore
.gitignore
 
 
KV10-PRM.tex
KV10-PRM.tex
 
 
Makefile
Makefile
 
 
Notes
Notes
 
 
README.adoc
README.adoc
 
 
TODO
TODO
 
 
alu.sv
alu.sv
 
 
alu.svh
alu.svh
 
 
ammonite.sv
ammonite.sv
 
 
apr.sv
apr.sv
 
 
barrel.sv
barrel.sv
 
 
cache.sv
cache.sv
 
 
constants.svh
constants.svh
 
 
decode.sv
decode.sv
 
 
decode.svh
decode.svh
 
 
disasm.svh
disasm.svh
 
 
functions.svh
functions.svh
 
 
io.svh
io.svh
 
 
kv10.asm
kv10.asm
 
 
kv10.def
kv10.def
 
 
kv10.svh
kv10.svh
 
 
mem-simple.sv
mem-simple.sv
 
 
mem-sram.sv
mem-sram.sv
 
 
mem-sync.sv
mem-sync.sv
 
 
mem.sv
mem.sv
 
 
opcodes.svh
opcodes.svh
 
 
pag.sv
pag.sv
 
 
pidp-10-test.sv
pidp-10-test.sv
 
 
pidp-10.sv
pidp-10.sv
 
 
sram.sv
sram.sv
 
 
tb-alu.sv
tb-alu.sv
 
 
tb-apr.sv
tb-apr.sv
 
 

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KV10 - A PDP-10 Processor

Here is the Verilog code to implement a PDP-10 processor. It’s most definitely still in development though it’s executing processor diagnostics in the simulator and has even run on a real FPGA once or twice.

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A PDP-10 processor written in Verilog

pdp10.froghouse.org/

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fpga verilog pdp-10

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