Issue #64: Display sometimes gets messed up with Teensy 4 #66
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So curiosity got the better of me...
To simulate an app taking longer than the allowed time slot I added a delay at the end of
CORE_timer_ISR
:This immediately produced garbage output on the display so I take that as confirmation of the "misbehaving app => DMA transfer corruption" theory. Even without DMA.
A minimal fix is to make
SH1106_128x64_Driver::Flush
wait forsendpage_state
to be 0 in the__IMXRT1062__
code path. When active, values now run from 1..4 => 0, and the display was stable.Notes
volatile
always seems icky, but this might be that rare occasion where it's ok (memory ordering doesn't seem critical here).Flush
to exit the ISR early, then hope for better luck next time?But that might be overthinking since ultimately this is just bandaiding the symptom.
OC::DEBUG::ISR_cycles
) which could be used for a simple "overload counter" or similar (the old school method would be to flash the screen border).