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update to VS 17.6 #11830

Merged
merged 4 commits into from
May 22, 2023
Merged

update to VS 17.6 #11830

merged 4 commits into from
May 22, 2023

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shuffle2
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@shuffle2 shuffle2 commented May 17, 2023 •
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bump minimum VS version to 17.6 and rollback some workarounds

I'll re-enable auto updates on the buildbot once beta is built (is it built already?)

@AdmiralCurtiss
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The beta has been set, you can update the buildbot.

@AdmiralCurtiss AdmiralCurtiss merged commit 68c3b1f into dolphin-emu:master May 22, 2023
@JosJuice
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JosJuice commented Jun 2, 2023

@shuffle2 We've received a report that the JIT doesn't work properly on AArch64 Windows anymore after this merge. Could you check if it works for you? The user reports that this assert is being triggered:

dolphin/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.cpp

Line 159 in 82d27fa

ASSERT(preg < GUEST_GPR_COUNT);

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shuffle2 commented Jun 4, 2023 •
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 	Dolphin.exe!Arm64GPRCache::GetGuestGPROpArg(unsigned __int64 preg) Line 159	C++
 	[Inline Frame] Dolphin.exe!Arm64GPRCache::GetImm(unsigned __int64) Line 274	C++
>	Dolphin.exe!JitArm64::boolX(UGeckoInstruction inst) Line 332	C++
 	Dolphin.exe!JitArm64::CompileInstruction(PPCAnalyst::CodeOp & op) Line 494	C++
 	Dolphin.exe!JitArm64::DoJit(unsigned int em_address, JitBlock * b, unsigned int nextPC) Line 1077	C++
 	Dolphin.exe!JitArm64::Jit(unsigned int em_address, bool clear_cache_and_retry_on_failure) Line 760	C++
 	0000019c8c6010a4()	Unknown

X0 = 0000019C7A630320 X1 = 0000001E00000000 X2 = 0000000000000000 X3 = 00000000FFFFFFFF X4 = 0000000000000001 X5 = 0000000000000000 X6 = 0000000000000002 X7 = 00007FF9246C9D00 X8 = 0000000000000000 X9 = 0000000000000014 X10 = 0000019C77213440 X11 = 0000000000000001 X12 = 0000000000000014 X13 = 0000000000000001 X14 = 0000000000000003 X15 = 0000000000000020 IP0 = 0000000080000001 IP1 = 0000019C7A2AA900 X18 = 00000012793DC000 X19 = 0000019C7A630000 X20 = 0000000000000000 X21 = 0000000000000005 X22 = 000000000000001E X23 = 000000007FC50278 X24 = 0000019C7A6B0000 X25 = 00007FF775D34650 X26 = 0000000080082A28 X27 = 0000000000000001 X28 = 0000019E92600000 FP = 000000127B0FF760 LR = 00007FF775615124 SP = 000000127B0FF5C0 PC = 00007FF775615124 

    const auto [i, j] = gpr.IsImm(s) ? std::pair(s, b) : std::pair(b, s);
00007FF7756150F4 AA1603E1             mov         x1,x22  
00007FF7756150F8 910C8260             add         x0,x19,#0x320  
00007FF7756150FC 97FFE35F             bl          Arm64GPRCache::GetGuestGPROpArg (07FF77560DE78h)  
00007FF775615100 AA1482C1             orr         x1,x22,x20,lsl #0x20  
00007FF775615104 B9400008             ldr         w8,[x0]  
00007FF775615108 71000D1F             cmp         w8,#3  
00007FF77561510C 54000040             beq         JitArm64::boolX+484h (07FF775615114h)  
00007FF775615110 AA168281             orr         x1,x20,x22,lsl #0x20  
    bool is_zero = gpr.GetImm(i) == 0;
00007FF775615114 F90003E1             str         x1,[sp]  
00007FF775615118 910C8260             add         x0,x19,#0x320  
00007FF77561511C AA0103E1             mov         x1,x1  
00007FF775615120 97FFE356             bl          Arm64GPRCache::GetGuestGPROpArg (07FF77560DE78h)

the problem appears to be that the mov at 00007FF77561511C should be narrowing. The compiler is storing the std::pair<int,int> in single 64bit register and should extract one of them, but doesn't for whatever reason. Question is if this is some weird C++ behavior or optimizer bug.

<title>Document</title>
  Name Value Type
  b 0x00000000 int
◢ gpr {...} Arm64GPRCache
  ◢ Arm64RegCache {m_jit=0x0000019c7a630000 {m_fault_to_handler={ size=0x000000000000022c } gpr={...} fpr={...} ...} m_emit=...} Arm64RegCache
  ▶ __vfptr 0x00007ff775db1040 {Dolphin.exe!void(* Arm64GPRCache::vftable'[7])()} {0x00007ff77560cae0 {Dolphin.exe!Arm64RegCache::scalar deleting destructor'(unsigned int)}, ...} void * *
  ▶ m_jit 0x0000019c7a630000 {m_fault_to_handler={ size=0x000000000000022c } gpr={...} fpr={...} ...} JitArm64 *
  ▶ m_emit 0x0000019c7a630220 {m_fault_to_handler={ size=0x000000000000022c } gpr={...} fpr={...} ...} Arm64Gen::ARM64XEmitter * {JitArm64}
  ▶ m_float_emit unique_ptr {m_emit=0x0000019c7a630220 {m_fault_to_handler={ size=0x000000000000022c } gpr={...} fpr={...} ...} } std::unique_ptr<Arm64Gen::ARM64FloatEmitter,std::default_deleteArm64Gen::ARM64FloatEmitter>
  ▶ m_host_registers { size=0x000000000000001c } std::vector<HostReg,std::allocator>
  ◢ m_guest_registers { size=0x0000000000000028 } std::vector<OpArg,std::allocator>
  [capacity] 0x0000000000000028 unsigned __int64
  ▶ [allocator] allocator std::_Compressed_pair<std::allocator,std::_Vector_val<std::_Simple_types>,1>
  ◢ [0x00000000] {m_type=Immediate (0x00000003) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  m_type Immediate (0x00000003) RegType
  m_reg INVALID_REG (0xffffffff) Arm64Gen::ARM64Reg
  m_value 0x00000000 unsigned int
  m_last_used 0x00000000 unsigned int
  m_dirty true bool
  ▶ [0x00000001] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x8021a710 ...} OpArg
  ▶ [0x00000002] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x80220be0 ...} OpArg
  ▶ [0x00000003] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x800e0000 ...} OpArg
  ▶ [0x00000004] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x431bde83 ...} OpArg
  ▶ [0x00000005] {m_type=Discarded (0x00000001) m_reg=INVALID_REG (0xffffffff) m_value=0x00000001 ...} OpArg
  ▶ [0x00000006] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x80000000 ...} OpArg
  ▶ [0x00000007] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000003 ...} OpArg
  ▶ [0x00000008] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x80082b1c ...} OpArg
  ▶ [0x00000009] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x0000000a] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x0000000b] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x0000000c] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x01000000 ...} OpArg
  ▶ [0x0000000d] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x8021fb80 ...} OpArg
  ▶ [0x0000000e] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x0000000f] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000010] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000011] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000012] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000013] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000014] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000015] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x80078f8c ...} OpArg
  ▶ [0x00000016] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x60000000 ...} OpArg
  ▶ [0x00000017] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x80207f00 ...} OpArg
  ▶ [0x00000018] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x80078f34 ...} OpArg
  ▶ [0x00000019] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x0000001a] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000001 ...} OpArg
  ▶ [0x0000001b] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x0000001c] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000003 ...} OpArg
  ▶ [0x0000001d] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x80082b1c ...} OpArg
  ◢ [0x0000001e] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x80080ff4 ...} OpArg
  m_type NotLoaded (0x00000000) RegType
  m_reg INVALID_REG (0xffffffff) Arm64Gen::ARM64Reg
  m_value 0x80080ff4 unsigned int
  m_last_used 0x00000000 unsigned int
  m_dirty false bool
  ▶ [0x0000001f] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000020] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000021] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000022] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000023] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000024] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000025] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000026] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [0x00000027] {m_type=NotLoaded (0x00000000) m_reg=INVALID_REG (0xffffffff) m_value=0x00000000 ...} OpArg
  ▶ [Raw View] {_Mypair=allocator } std::vector<OpArg,std::allocator>
  ▶ m_reg_stats 0x0000000000000000 PPCAnalyst::BlockRegStats *
▶ inst {hex=0x7fc50278 Rc=0x00000000 SUBOP10=0x0000013c ...} UGeckoInstruction
  inst.SUBOP10 0x0000013c unsigned int
  s 0x0000001e int
▶ this 0x0000019c7a630000 {m_fault_to_handler={ size=0x000000000000022c } gpr={...} fpr={...} ...} JitArm64 *

gpr.IsImm(s) is false so [i,j] should be std::pair(b, s) which is {u32 0; u32 0x1e} hence 0x1e00000000 when read as 64bit little endian. i should be 0 i guess.

@JosJuice JosJuice mentioned this pull request Jun 5, 2023
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@Medard22 Medard22 mentioned this pull request Mar 12, 2024
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3 participants
@shuffle2 @AdmiralCurtiss @JosJuice